On 04:36-20230329, Hari Nagalla wrote:
> The J784S4 SoCs have 4 dual-core Arm Cortex-R5F processor (R5FSS)
> subsystems/clusters. One R5F cluster (MCU_R5FSS0) is present within
> the MCU domain, and the remaining three clusters are present in the
> MAIN domain (MAIN_R5FSS0, MAIN_R5FSS1 & MAIN_R5FSS2). The functionality
> of the R5FSS is same as the R5FSS functionality on earlier K3 platform
> device J721S2. Each of the R5FSS can be configured at boot time to be
> either run in a LockStep mode or in an Asymmetric Multi Processing (AMP)
> fashion in Split-mode. These subsystems have 64 KB each Tightly-Coupled
> Memory (TCM) internal memories for each core split between two banks -
> ATCM and BTCM (further interleaved into two banks). There are some IP
> integration differences from standard Arm R5 clusters such as the absence
> of an ACP port, presence of an additional TI-specific Region Address
> Translater (RAT) module for translating 32-bit CPU addresses into
> larger system bus addresses etc.
>
> Add the DT nodes for these three MAIN domain R5F cluster/subsystems,
> the two R5F cores are each added as child nodes to the corresponding
> main cluster node. The clusters are configured to run in LockStep
> mode by default, with the ATCMs enabled to allow the R5 cores to execute
> code from DDR with boot-strapping code from ATCM. The inter-processor
> communication between the main A72 cores and these processors is
> achieved through shared memory and Mailboxes.
>
> The following firmware names are used by default for these cores, and
> can be overridden in a board dts file if needed:
> MAIN R5FSS0 Core0: j784s4-main-r5f0_0-fw (both in LockStep and Split modes)
> MAIN R5FSS0 Core1: j784s4-main-r5f0_1-fw (needed only in Split mode)
> MAIN R5FSS1 Core0: j784s4-main-r5f1_0-fw (both in LockStep and Split modes)
> MAIN R5FSS1 Core1: j784s4-main-r5f1_1-fw (needed only in Split mode)
> MAIN R5FSS2 Core0: j784s4-main-r5f2_0-fw (both in LockStep and Split modes)
> MAIN R5FSS2 Core1: j784s4-main-r5f2_1-fw (needed only in Split mode)
Why are the patches split up into main and mcu - if you are adding r5f
cores, do them as a single patch.
>
> Signed-off-by: Hari Nagalla <hnagalla@xxxxxx>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 128 +++++++++++++++++++++
> 1 file changed, 128 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index 8c1474a7bd0f..53d337ea35fb 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -1024,4 +1024,132 @@
> bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
> status = "disabled";
> };
> +
> + main_r5fss0: r5fss@5c00000 {
> + compatible = "ti,j721s2-r5fss";
> + ti,cluster-mode = <1>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
> + <0x5d00000 0x00 0x5d00000 0x20000>;
> + power-domains = <&k3_pds 336 TI_SCI_PD_EXCLUSIVE>;
> +
> + main_r5fss0_core0: r5f@5c00000 {
> + compatible = "ti,j721s2-r5f";
> + reg = <0x5c00000 0x00010000>,
> + <0x5c10000 0x00010000>;
> + reg-names = "atcm", "btcm";
> + ti,sci = <&sms>;
> + ti,sci-dev-id = <339>;
> + ti,sci-proc-ids = <0x06 0xff>;
> + resets = <&k3_reset 339 1>;
> + firmware-name = "j784s4-main-r5f0_0-fw";
> + ti,atcm-enable = <1>;
> + ti,btcm-enable = <1>;
> + ti,loczrama = <1>;
> + status = "disabled";
Why are these disabled by default?
> + };
> +
> + main_r5fss0_core1: r5f@5d00000 {
> + compatible = "ti,j721s2-r5f";
> + reg = <0x5d00000 0x00010000>,
> + <0x5d10000 0x00010000>;
> + reg-names = "atcm", "btcm";
> + ti,sci = <&sms>;
> + ti,sci-dev-id = <340>;
> + ti,sci-proc-ids = <0x07 0xff>;
> + resets = <&k3_reset 340 1>;
> + firmware-name = "j784s4-main-r5f0_1-fw";
> + ti,atcm-enable = <1>;
> + ti,btcm-enable = <1>;
> + ti,loczrama = <1>;
> + status = "disabled";
> + };
> +
> + };
> +
> + main_r5fss1: r5fss@5e00000 {
> + compatible = "ti,j721s2-r5fss";
> + ti,cluster-mode = <1>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
> + <0x5f00000 0x00 0x5f00000 0x20000>;
> + power-domains = <&k3_pds 337 TI_SCI_PD_EXCLUSIVE>;
> +
> + main_r5fss1_core0: r5f@5e00000 {
> + compatible = "ti,j721s2-r5f";
> + reg = <0x5e00000 0x00010000>,
> + <0x5e10000 0x00010000>;
> + reg-names = "atcm", "btcm";
> + ti,sci = <&sms>;
> + ti,sci-dev-id = <341>;
> + ti,sci-proc-ids = <0x08 0xff>;
> + resets = <&k3_reset 341 1>;
> + firmware-name = "j784s4-main-r5f1_0-fw";
> + ti,atcm-enable = <1>;
> + ti,btcm-enable = <1>;
> + ti,loczrama = <1>;
> + status = "disabled";
> + };
> +
> + main_r5fss1_core1: r5f@5f00000 {
> + compatible = "ti,j721s2-r5f";
> + reg = <0x5f00000 0x00010000>,
> + <0x5f10000 0x00010000>;
> + reg-names = "atcm", "btcm";
> + ti,sci = <&sms>;
> + ti,sci-dev-id = <342>;
> + ti,sci-proc-ids = <0x09 0xff>;
> + resets = <&k3_reset 342 1>;
> + firmware-name = "j784s4-main-r5f1_1-fw";
> + ti,atcm-enable = <1>;
> + ti,btcm-enable = <1>;
> + ti,loczrama = <1>;
> + status = "disabled";
> + };
> + };
> +
> + main_r5fss2: r5fss@5900000 {
> + compatible = "ti,j721s2-r5fss";
> + ti,cluster-mode = <1>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x5900000 0x00 0x5900000 0x20000>,
> + <0x5a00000 0x00 0x5a00000 0x20000>;
> + power-domains = <&k3_pds 338 TI_SCI_PD_EXCLUSIVE>;
> +
> + main_r5fss2_core0: r5f@5900000 {
> + compatible = "ti,j721s2-r5f";
> + reg = <0x5900000 0x00010000>,
> + <0x5910000 0x00010000>;
> + reg-names = "atcm", "btcm";
> + ti,sci = <&sms>;
> + ti,sci-dev-id = <343>;
> + ti,sci-proc-ids = <0x0a 0xff>;
> + resets = <&k3_reset 343 1>;
> + firmware-name = "j784s4-main-r5f2_0-fw";
> + ti,atcm-enable = <1>;
> + ti,btcm-enable = <1>;
> + ti,loczrama = <1>;
> + status = "disabled";
> + };
> +
> + main_r5fss2_core1: r5f@5a00000 {
> + compatible = "ti,j721s2-r5f";
> + reg = <0x5a00000 0x00010000>,
> + <0x5a10000 0x00010000>;
> + reg-names = "atcm", "btcm";
> + ti,sci = <&sms>;
> + ti,sci-dev-id = <344>;
> + ti,sci-proc-ids = <0x0b 0xff>;
> + resets = <&k3_reset 344 1>;
> + firmware-name = "j784s4-main-r5f2_1-fw";
> + ti,atcm-enable = <1>;
> + ti,btcm-enable = <1>;
> + ti,loczrama = <1>;
> + status = "disabled";
> +
> + };
> + };
> };
> --
> 2.17.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
