Describe the PCIe bus clock, and enable the PCIe controller on the
Marzen development board.
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
---
arch/arm/boot/dts/r8a7779-marzen.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
index 632519edba6b5a47..a001e4285fd76366 100644
--- a/arch/arm/boot/dts/r8a7779-marzen.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
@@ -260,6 +260,14 @@ &tmu0 {
status = "okay";
};
+&pcie_bus_clk {
+ clock-frequency = <100000000>;
+};
+
+&pciec {
+ status = "okay";
+};
+
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
--
2.34.1
