Since the cpuboot memory region is not part of the RAM SoC, move cpuboot
in a deidicated syscon node.
This patch helps to keep backward-compatibility with older version of
uboot codebase where we have a limit of 8 reserved-memory dts child
nodes.
Signed-off-by: Lorenzo Bianconi <lorenzo@xxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 21 +++++++++++----------
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index 51944690e790..668b6cfa6a3d 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -113,12 +113,6 @@ wo_dlm1: wo-dlm@151f8000 {
reg = <0 0x151f8000 0 0x2000>;
no-map;
};
-
- wo_boot: wo-boot@15194000 {
- reg = <0 0x15194000 0 0x1000>;
- no-map;
- };
-
};
timer {
@@ -461,10 +455,11 @@ wed0: wed@15010000 {
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
- <&wo_data>, <&wo_boot>;
+ <&wo_data>;
memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
- "wo-data", "wo-boot";
+ "wo-data";
mediatek,wo-ccif = <&wo_ccif0>;
+ mediatek,wo-cpuboot = <&wo_cpuboot>;
};
wed1: wed@15011000 {
@@ -474,10 +469,11 @@ wed1: wed@15011000 {
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
memory-region = <&wo_emi1>, <&wo_ilm1>, <&wo_dlm1>,
- <&wo_data>, <&wo_boot>;
+ <&wo_data>;
memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
- "wo-data", "wo-boot";
+ "wo-data";
mediatek,wo-ccif = <&wo_ccif1>;
+ mediatek,wo-cpuboot = <&wo_cpuboot>;
};
wo_ccif0: syscon@151a5000 {
@@ -494,6 +490,11 @@ wo_ccif1: syscon@151ad000 {
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
};
+ wo_cpuboot: syscon@15194000 {
+ compatible = "mediatek,mt7986-wo-cpuboot", "syscon";
+ reg = <0 0x15194000 0 0x1000>;
+ };
+
eth: ethernet@15100000 {
compatible = "mediatek,mt7986-eth";
reg = <0 0x15100000 0 0x80000>;
--
2.39.2
