Since the cpuboot memory region is not part of the RAM SoC, move dlm in
a deidicated syscon node.
This patch helps to keep backward-compatibility with older version of
uboot codebase where we have a limit of 8 reserved-memory dts child
nodes.
Signed-off-by: Lorenzo Bianconi <lorenzo@xxxxxxxxxx>
---
.../arm/mediatek/mediatek,mt7622-wed.yaml | 12 +++--
.../soc/mediatek/mediatek,mt7986-wo-dlm.yaml | 46 +++++++++++++++++++
2 files changed, 54 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-dlm.yaml
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml
index 5d2397ec5891..e4707880eca7 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml
@@ -32,13 +32,11 @@ properties:
memory-region:
items:
- description: firmware EMI region
- - description: firmware DLM region
- description: firmware CPU DATA region
memory-region-names:
items:
- const: wo-emi
- - const: wo-dlm
- const: wo-data
mediatek,wo-ccif:
@@ -53,6 +51,10 @@ properties:
$ref: /schemas/types.yaml#/definitions/phandle
description: mediatek wed-wo ilm interface.
+ mediatek,wo-dlm:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: mediatek wed-wo dlm interface.
+
allOf:
- if:
properties:
@@ -66,6 +68,7 @@ allOf:
mediatek,wo-ccif: false
mediatek,wo-cpuboot: false
mediatek,wo-ilm: false
+ mediatek,wo-dlm: false
required:
- compatible
@@ -100,10 +103,11 @@ examples:
reg = <0 0x15010000 0 0x1000>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
- memory-region = <&wo_emi>, <&wo_dlm>, &wo_data>;
- memory-region-names = "wo-emi", "wo-dlm", "wo-data";
+ memory-region = <&wo_emi>, <&wo_data>;
+ memory-region-names = "wo-emi", "wo-data";
mediatek,wo-ccif = <&wo_ccif0>;
mediatek,wo-cpuboot = <&wo_cpuboot>;
mediatek,wo-ilm = <&wo_ilm>;
+ mediatek,wo-dlm = <&wo_dlm>;
};
};
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-dlm.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-dlm.yaml
new file mode 100644
index 000000000000..2b9c6a8ef918
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-dlm.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mt7986-wo-dlm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Wireless Ethernet Dispatch (WED) WO DLM firmware interface for MT7986
+
+maintainers:
+ - Lorenzo Bianconi <lorenzo@xxxxxxxxxx>
+ - Felix Fietkau <nbd@xxxxxxxx>
+
+description:
+ The MediaTek wo-dlm (Data Lifecycle Management) provides a configuration
+ interface for WED WO firmware rx rings, including firmware I/O descriptor
+ ring, feedback command ring. WED WO controller is used to perform offload
+ rx packet processing (e.g. 802.11 aggregation packet reordering or rx
+ header translation) on MT7986 soc.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - mediatek,mt7986-wo-dlm
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ syscon@151e8000 {
+ compatible = "mediatek,mt7986-wo-dlm", "syscon";
+ reg = <0 0x151e8000 0 0x2000>;
+ };
+ };
--
2.39.2
