On 28/02/2023 19:49, Ken Sloat wrote:
> The ADI PHY contains a feature commonly known as "Fast Link Down" and
> called "Enhanced Link Detection" by ADI. This feature is enabled by
> default and provides earlier detection of link loss in certain
> situations.
>
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC. It might happen, that command when run on an older
kernel, gives you outdated entries. Therefore please be sure you base
your patches on recent Linux kernel.
> Document the new optional flags "adi,disable-fast-down-1000base-t" and
> "adi,disable-fast-down-100base-tx" which disable the "Fast Link Down"
> feature in the ADI PHY.
You did not explain why do you need it.
>
> Signed-off-by: Ken Sloat <ken.s@xxxxxxxxxxxxx>
> ---
Don't attach your new patchsets to your old threads. It buries them deep
and make usage of our tools difficult.
> Documentation/devicetree/bindings/net/adi,adin.yaml | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml
> index 64ec1ec71ccd..923baff26c3e 100644
> --- a/Documentation/devicetree/bindings/net/adi,adin.yaml
> +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
> @@ -52,6 +52,18 @@ properties:
> description: Enable 25MHz reference clock output on CLK25_REF pin.
> type: boolean
>
> + adi,disable-fast-down-1000base-t:
> + $ref: /schemas/types.yaml#definitions/flag
> + description: |
> + If set, disables any ADI fast link down ("Enhanced Link Detection")
> + function bits for 1000base-t interfaces.
And why disabling it per board should be a property of DT?
Best regards,
Krzysztof
