On 21/02/2023 09:33, Xingyu Wu wrote: > Add bindings for the Image-Signal-Process clock and reset > generator (ISPCRG) on the JH7110 RISC-V SoC by StarFive Ltd. > > Signed-off-by: Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
