Re: [PATCH v2 5/7] media: dt-bindings: samsung,exynos4212-is: convert to dtschema

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On Tue, Feb 14, 2023 at 11:45:06AM +0100, Krzysztof Kozlowski wrote:
> Convert the Samsung Exynos4212/4412 SoC Imaging Subsystem (FIMC-IS)
> bindings to DT schema.  Changes during conversion - adjust to existing
> DTS and Linux driver: add iommus and power-domains.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> ---
>  .../bindings/media/exynos4-fimc-is.txt        |  50 ----
>  .../media/samsung,exynos4212-fimc-is.yaml     | 221 ++++++++++++++++++
>  MAINTAINERS                                   |   1 +
>  3 files changed, 222 insertions(+), 50 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/media/exynos4-fimc-is.txt
>  create mode 100644 Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml
> 
> diff --git a/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt b/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt
> deleted file mode 100644
> index 32ced99d4244..000000000000
> --- a/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt
> +++ /dev/null
> @@ -1,50 +0,0 @@
> -Exynos4x12 SoC series Imaging Subsystem (FIMC-IS)
> -
> -The FIMC-IS is a subsystem for processing image signal from an image sensor.
> -The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
> -processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
> -and SPI bus controllers, PWM and ADC.
> -
> -fimc-is node
> -------------
> -
> -Required properties:
> -- compatible	: should be "samsung,exynos4212-fimc-is" for Exynos4212 and
> -		  Exynos4412 SoCs;
> -- reg		: physical base address and length of the registers set;
> -- interrupts	: must contain two FIMC-IS interrupts, in order: ISP0, ISP1;
> -- clocks	: list of clock specifiers, corresponding to entries in
> -		  clock-names property;
> -- clock-names	: must contain "ppmuispx", "ppmuispx", "lite0", "lite1"
> -		  "mpll", "sysreg", "isp", "drc", "fd", "mcuisp", "gicisp",
> -		  "pwm_isp", "mcuctl_isp", "uart", "ispdiv0", "ispdiv1",
> -		  "mcuispdiv0", "mcuispdiv1", "aclk200", "div_aclk200",
> -		  "aclk400mcuisp", "div_aclk400mcuisp" entries,
> -		  matching entries in the clocks property.
> -pmu subnode
> ------------
> -
> -Required properties:
> - - reg : must contain PMU physical base address and size of the register set.
> -
> -The following are the FIMC-IS peripheral device nodes and can be specified
> -either standalone or as the fimc-is node child nodes.
> -
> -i2c-isp (ISP I2C bus controller) nodes
> -------------------------------------------
> -
> -Required properties:
> -
> -- compatible	: should be "samsung,exynos4212-i2c-isp" for Exynos4212 and
> -		  Exynos4412 SoCs;
> -- reg		: physical base address and length of the registers set;
> -- clocks	: must contain gate clock specifier for this controller;
> -- clock-names	: must contain "i2c_isp" entry.
> -
> -For the above nodes it is required to specify a pinctrl state named "default",
> -according to the pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt.
> -
> -Device tree nodes of the image sensors' controlled directly by the FIMC-IS
> -firmware must be child nodes of their corresponding ISP I2C bus controller node.
> -The data link of these image sensors must be specified using the common video
> -interfaces bindings, defined in video-interfaces.txt.
> diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml
> new file mode 100644
> index 000000000000..288f4bf3d44d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml
> @@ -0,0 +1,221 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/samsung,exynos4212-fimc-is.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos4212/4412 SoC Imaging Subsystem (FIMC-IS)
> +
> +maintainers:
> +  - Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> +  - Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx>
> +
> +description:
> +  The FIMC-IS is a subsystem for processing image signal from an image sensor.
> +  The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
> +  processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
> +  and SPI bus controllers, PWM and ADC.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - samsung,exynos4212-fimc-is
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#address-cells':
> +    const: 1
> +
> +  clocks:
> +    maxItems: 21
> +
> +  clock-names:
> +    items:
> +      - const: lite0
> +      - const: lite1
> +      - const: ppmuispx
> +      - const: ppmuispmx
> +      - const: isp
> +      - const: drc
> +      - const: fd
> +      - const: mcuisp
> +      - const: gicisp
> +      - const: mcuctl_isp
> +      - const: pwm_isp
> +      - const: ispdiv0
> +      - const: ispdiv1
> +      - const: mcuispdiv0
> +      - const: mcuispdiv1
> +      - const: mpll
> +      - const: aclk200
> +      - const: aclk400mcuisp
> +      - const: div_aclk200
> +      - const: div_aclk400mcuisp
> +      - const: uart
> +
> +  interrupts:
> +    maxItems: 2
> +
> +  iommus:
> +    maxItems: 4
> +
> +  iommu-names:
> +    items:
> +      - const: isp
> +      - const: drc
> +      - const: fd
> +      - const: mcuctl
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  ranges: true
> +
> +  '#size-cells':
> +    const: 1

Normally this is next to #address-cells.

> +
> +patternProperties:
> +  "^pmu@[0-9a-f]+$":
> +    type: object
> +    additionalProperties: false
> +    description:
> +      Node representing the SoC's Power Management Unit (duplicated with the
> +      correct PMU node in the SoC).
> +
> +    properties:
> +      reg:
> +        maxItems: 1
> +
> +    required:
> +      - reg
> +
> +  "^i2c-isp@[0-9a-f]+$":
> +    type: object
> +    $ref: /schemas/i2c/i2c-controller.yaml#
> +    unevaluatedProperties: false
> +      #additionalProperties: false

??

> +    description:
> +      ISP I2C bus controller





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