Add DT bindings for DSS clock divider of TI's AM62 family of SoCs. Signed-off-by: Aradhya Bhatia <a-bhatia1@xxxxxx> --- .../clock/ti,am62-dss-vp0-div-clk.yaml | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/ti,am62-dss-vp0-div-clk.yaml diff --git a/Documentation/devicetree/bindings/clock/ti,am62-dss-vp0-div-clk.yaml b/Documentation/devicetree/bindings/clock/ti,am62-dss-vp0-div-clk.yaml new file mode 100644 index 000000000000..310d2a989d5b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/ti,am62-dss-vp0-div-clk.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/ti,am62-dss-vp0-div-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI AM62 DSS - OLDI Divider Clock + +maintainers: + - Aradhya Bhatia <a-bhatia1@xxxxxx> + +properties: + compatible: + items: + - const: ti,am62-dss-vp0-div-clk + + "#clock-cells": + const: 0 + + clocks: + maxItems: 1 + + clock-div: + description: Fixed divider + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + +required: + - compatible + - clocks + - "#clock-cells" + - clock-div + +additionalProperties: false + +examples: + - | + clock { + compatible = "ti,am62-dss-vp0-div-clk"; + clocks = <&parent_clock>; + #clock-cells = <0>; + clock-div = <7>; + }; +... -- 2.39.1
