On 1/24/23 18:55, Daniel Lezcano wrote:
On 24/01/2023 18:46, Amjad Ouled-Ameur wrote:
On 1/24/23 17:54, Daniel Lezcano wrote:
Hi Amjad,
On 24/01/2023 11:08, Amjad Ouled-Ameur wrote:
[ ... ]
IIUC, there is a sensor per couple of cores. 1 x 2Bigs, 1 x 2Bigs, 1 x 4 Little, right ?
MT8365 SoC has 4 x A53 CPUs. The SoC has 4 thermal zones per sensor. Thermal zone 0 corresponds
to all 4 x A53 CPUs, the other thermal zones (1, 2 and 3) has nothing to do with CPUs. The cooling device type
used for CPUs is passive. FYI, thermal zones 1, 2 and 3 are present in the SoC for debug-purpose only, they are not supposed
to be used for production.
After reconsidering the fact that zones 1, 2 and 3 are only used for dev/debug, it might be best to avo >
aggregation as you suggested, and keep only support for zone 0 in this driver. Thus I suggest I send a V8
where I keep only below fixes for this patch if that's okay with you:
- Define "raw_to_mcelsius" function pointer for "struct thermal_bank_cfg".
- Fix "mtk_thermal" variable in mtk_read_temp().
- Set "mt->raw_to_mcelsius" in probe().
For zones 1, 2 and 3 we can later add a different driver specific for dev/debug to probe them to
avoid confusion.
You can add them in the driver and in the device tree, but just add the cooling device for the thermal zone 0.
Thermal zone 0 uses CPU{0..3} for passive cooling, in this case we should register cooling device with
cpufreq_cooling_register() for each CPU right ?
No, the OF code device tree does already that. You just have to register the different thermal zones.
Do you have a pointer to a device tree for this board and the thermal setup ?
Sure, here is a dtsi for MT8365 SoC which contains thermal nodes [0].
[0]: https://lore.kernel.org/linux-arm-kernel/20220531135026.238475-17-fparent@xxxxxxxxxxxx/#Z31arch:arm64:boot:dts:mediatek:mt8365.dtsi
