On 7.01.2023 12:09, Stephan Gerhold wrote:
> i2c-qup allows using DMA to speed up larger transfers. In msm8916.dtsi
> the DMA channels are already assigned to the SPI controllers but
> missing for I2C. Add them there as well.
>
> This also fixes confusing errors in dmesg for each I2C controller:
> i2c_qup 78b6000.i2c: tx channel not available
>
> Signed-off-by: Stephan Gerhold <stephan@xxxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Konrad
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 98da982548a1..daece6b9e932 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1559,6 +1559,8 @@ blsp_i2c1: i2c@78b5000 {
> clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
> <&gcc GCC_BLSP1_AHB_CLK>;
> clock-names = "core", "iface";
> + dmas = <&blsp_dma 4>, <&blsp_dma 5>;
> + dma-names = "tx", "rx";
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&i2c1_default>;
> pinctrl-1 = <&i2c1_sleep>;
> @@ -1591,6 +1593,8 @@ blsp_i2c2: i2c@78b6000 {
> clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
> <&gcc GCC_BLSP1_AHB_CLK>;
> clock-names = "core", "iface";
> + dmas = <&blsp_dma 6>, <&blsp_dma 7>;
> + dma-names = "tx", "rx";
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&i2c2_default>;
> pinctrl-1 = <&i2c2_sleep>;
> @@ -1623,6 +1627,8 @@ blsp_i2c3: i2c@78b7000 {
> clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
> <&gcc GCC_BLSP1_AHB_CLK>;
> clock-names = "core", "iface";
> + dmas = <&blsp_dma 8>, <&blsp_dma 9>;
> + dma-names = "tx", "rx";
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&i2c3_default>;
> pinctrl-1 = <&i2c3_sleep>;
> @@ -1655,6 +1661,8 @@ blsp_i2c4: i2c@78b8000 {
> clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
> <&gcc GCC_BLSP1_AHB_CLK>;
> clock-names = "core", "iface";
> + dmas = <&blsp_dma 10>, <&blsp_dma 11>;
> + dma-names = "tx", "rx";
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&i2c4_default>;
> pinctrl-1 = <&i2c4_sleep>;
> @@ -1687,6 +1695,8 @@ blsp_i2c5: i2c@78b9000 {
> clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
> <&gcc GCC_BLSP1_AHB_CLK>;
> clock-names = "core", "iface";
> + dmas = <&blsp_dma 12>, <&blsp_dma 13>;
> + dma-names = "tx", "rx";
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&i2c5_default>;
> pinctrl-1 = <&i2c5_sleep>;
> @@ -1719,6 +1729,8 @@ blsp_i2c6: i2c@78ba000 {
> clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
> <&gcc GCC_BLSP1_AHB_CLK>;
> clock-names = "core", "iface";
> + dmas = <&blsp_dma 14>, <&blsp_dma 15>;
> + dma-names = "tx", "rx";
> pinctrl-names = "default", "sleep";
> pinctrl-0 = <&i2c6_default>;
> pinctrl-1 = <&i2c6_sleep>;
