On 12/26/22 07:36, Anand Moon wrote: > Rockchip RV1126 has GMAC 10/100/1000M ethernet controller. > Enable ethernet node on Neu2-IO board. > > Signed-off-by: Anand Moon <anand@xxxxxxxxxx> > --- > drop SoB of Jagan Teki > --- > arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts | 37 ++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts b/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts > index dded0a12f0cd..bd592026eae6 100644 > --- a/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts > +++ b/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts > @@ -22,6 +22,43 @@ chosen { > }; > }; > > +&gmac { > + clock_in_out = "input"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmiim1_pins &clk_out_ethernetm1_pins>; > + phy-mode = "rgmii"; > + phy-handle = <&phy>; > + assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>, > + <&cru CLK_GMAC_ETHERNET_OUT>; align > + assigned-clock-parents = <&cru CLK_GMAC_SRC_M1>, <&cru RGMII_MODE_CLK>; > + assigned-clock-rates = <125000000>, <0>, <25000000>; > + phy-supply = <&vcc_3v3>; > + tx_delay = <0x2a>; > + rx_delay = <0x1a>; > + status = "okay"; > +}; > + > +&mdio { > + phy: phy@0 { use ethernet-phy no '#phy-cells' here > + compatible = "ethernet-phy-id001c.c916", > + "ethernet-phy-ieee802.3-c22"; align > + reg = <0x0>; > + pinctrl-names = "default"; > + pinctrl-0 = <ð_phy_rst>; > + reset-assert-us = <20000>; > + reset-deassert-us = <100000>; > + reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; > + }; > +}; > + > +&pinctrl { > + ethernet { Maybe use a node name more in line with where it is used. > + eth_phy_rst: eth-phy-rst { > + rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; > + }; > + }; > +}; > + > &sdmmc { > bus-width = <4>; > cap-mmc-highspeed;