Add bindings for the timer on the JH7110 RISC-V SoC by StarFive Technology Ltd. Signed-off-by: Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> --- .../timer/starfive,jh7110-timers.yaml | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml diff --git a/Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml b/Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml new file mode 100644 index 000000000000..fe58dc056313 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/starfive,jh7110-timers.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/starfive,jh7110-timers.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive Timers + +maintainers: + - Samin Guo <samin.guo@xxxxxxxxxxxxxxxx> + - Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> + +properties: + compatible: + const: starfive,jh7110-timers + + reg: + maxItems: 1 + + interrupts: + items: + - description: timer channel 0 interrupt + - description: timer channel 1 interrupt + - description: timer channel 2 interrupt + - description: timer channel 3 interrupt + + interrupt-names: + items: + - const: timer0 + - const: timer1 + - const: timer2 + - const: timer3 + + clocks: + items: + - description: timer channel 0 clock + - description: timer channel 1 clock + - description: timer channel 2 clock + - description: timer channel 3 clock + - description: APB clock + + clock-names: + items: + - const: timer0 + - const: timer1 + - const: timer2 + - const: timer3 + - const: apb + + resets: + items: + - description: timer channel 0 reset + - description: timer channel 1 reset + - description: timer channel 2 reset + - description: timer channel 3 reset + - description: APB reset + + reset-names: + items: + - const: timer0 + - const: timer1 + - const: timer2 + - const: timer3 + - const: apb + + clock-frequency: + description: The frequency of the clock that drives the counter, in Hz. + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - resets + - reset-names + - clock-frequency + +unevaluatedProperties: false + +examples: + - | + timer@13050000 { + compatible = "starfive,jh7110-timers"; + reg = <0x13050000 0x10000>; + interrupts = <69>, <70>, <71> ,<72>; + interrupt-names = "timer0", "timer1", "timer2", "timer3"; + clocks = <&clk 125>, + <&clk 126>, + <&clk 127>, + <&clk 128>, + <&clk 124>; + clock-names = "timer0", "timer1", + "timer2", "timer3", "apb"; + resets = <&rst 118>, + <&rst 119>, + <&rst 120>, + <&rst 121>, + <&rst 117>; + reset-names = "timer0", "timer1", + "timer2", "timer3", "apb"; + clock-frequency = <24000000>; + }; + -- 2.25.1
