On 17.12.2022 01:17, Dmitry Baryshkov wrote:
> The QCS404 uses 28nm HDMI PHY. The in-kernel driver doesn't provide the
> PLL (yet), but the out of tree patches used the name "hdmi_pll" for it.
> Other Qualcomm HDMI PHYs use either the name "hdmi_pll" (8960) or
> "hdmipll" (8996). Thus change the expected HDMI PLL clock name to
> "hdmi_pll".
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Konrad
> drivers/clk/qcom/gcc-qcs404.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
> index 23562096298d..5636c6524d0f 100644
> --- a/drivers/clk/qcom/gcc-qcs404.c
> +++ b/drivers/clk/qcom/gcc-qcs404.c
> @@ -160,7 +160,7 @@ static const struct parent_map gcc_parent_map_8[] = {
>
> static const char * const gcc_parent_names_8[] = {
> "cxo",
> - "hdmi_phy_pll_clk",
> + "hdmi_pll",
> "core_bi_pll_test_se",
> };
>
