On Tue, Dec 13, 2022 at 05:49:32PM +0000, Lad, Prabhakar wrote: > Hi Geert, > > Thank you for the review. > > On Tue, Dec 13, 2022 at 5:21 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote: > > > > Hi Prabhakar, > > > > On Mon, Dec 12, 2022 at 12:58 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote: > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > > > > Introduce ALTERNATIVE_3() macro. > > > > > > A vendor wants to replace an old_content, but another vendor has used > > > ALTERNATIVE_2() to patch its customized content at the same location. > > > In this case, this vendor can use macro ALTERNATIVE_3() and then replace > > > ALTERNATIVE_2() with ALTERNATIVE_3() to append its customized content. > > > > > > While at it update comment above ALTERNATIVE_2() macro and make it generic > > > so that the comment holds good for any new addition of ALTERNATIVE_X() > > > macros. > > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > > > --- > > > v4->v5 > > > * Rebased the patch on top of Andrew's series (now in Palmers for next-branch) > > > * Updated comment for ALTERNATIVE_x() as suggested by Heiko > > > > Thanks for the update! > > > > > --- a/arch/riscv/include/asm/alternative-macros.h > > > +++ b/arch/riscv/include/asm/alternative-macros.h > > > @@ -50,8 +50,17 @@ > > > ALT_NEW_CONTENT \vendor_id_2, \errata_id_2, \enable_2, \new_c_2 > > > .endm > > > > > > +.macro ALTERNATIVE_CFG_3 old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \ > > > + new_c_2, vendor_id_2, errata_id_2, enable_2, \ > > > + new_c_3, vendor_id_3, errata_id_3, enable_3 > > > + ALTERNATIVE_CFG_2 \old_c, \new_c_1, \vendor_id_1, \errata_id_1, \enable_1, \ > > > + \new_c_2, \vendor_id_2, \errata_id_2, \enable_2 > > > + ALT_NEW_CONTENT \vendor_id_3, \errata_id_3, \enable_3, \new_c_3 > > > +.endm > > > + > > > #define __ALTERNATIVE_CFG(...) ALTERNATIVE_CFG __VA_ARGS__ > > > #define __ALTERNATIVE_CFG_2(...) ALTERNATIVE_CFG_2 __VA_ARGS__ > > > +#define __ALTERNATIVE_CFG_3(...) ALTERNATIVE_CFG_3 __VA_ARGS__ > > > > > > #else /* !__ASSEMBLY__ */ > > > > > > @@ -98,6 +107,13 @@ > > > __ALTERNATIVE_CFG(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1) \ > > > ALT_NEW_CONTENT(vendor_id_2, errata_id_2, enable_2, new_c_2) > > > > > > +#define __ALTERNATIVE_CFG_3(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \ > > > + new_c_2, vendor_id_2, errata_id_2, enable_2, \ > > > + new_c_3, vendor_id_3, errata_id_3, enable_3) \ > > > + __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, enable_1, \ > > > + new_c_2, vendor_id_2, errata_id_2, enable_2) \ > > > + ALT_NEW_CONTENT(vendor_id_3, errata_id_3, enable_3, new_c_3) > > > + > > > #endif /* __ASSEMBLY__ */ > > > > > > #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, errata_id, CONFIG_k) \ > > > @@ -108,6 +124,13 @@ > > > __ALTERNATIVE_CFG_2(old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1), \ > > > new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2)) > > > > > > +#define _ALTERNATIVE_CFG_3(old_c, new_c_1, vendor_id_1, errata_id_1, CONFIG_k_1, \ > > > + new_c_2, vendor_id_2, errata_id_2, CONFIG_k_2, \ > > > + new_c_3, vendor_id_3, errata_id_3, CONFIG_k_3) \ > > > + __ALTERNATIVE_CFG_3(old_c, new_c_1, vendor_id_1, errata_id_1, IS_ENABLED(CONFIG_k_1), \ > > > + new_c_2, vendor_id_2, errata_id_2, IS_ENABLED(CONFIG_k_2), \ > > > + new_c_3, vendor_id_3, errata_id_3, IS_ENABLED(CONFIG_k_3)) > > > + > > > #else /* CONFIG_RISCV_ALTERNATIVE */ > > > > To avoid breaking the build for K210 (and VexRiscv), you need to provide > > _ALTERNATIVE_CFG_3() for the !CONFIG_RISCV_ALTERNATIVE case, too: > > > Thanks for testing this. > > > @@ -144,6 +144,9 @@ > > #define _ALTERNATIVE_CFG_2(old_c, ...) \ > > ALTERNATIVE_CFG old_c > > > > +#define _ALTERNATIVE_CFG_3(old_c, ...) \ > > + ALTERNATIVE_CFG old_c > > + > > #else /* !__ASSEMBLY__ */ > > > > #define __ALTERNATIVE_CFG(old_c) \ > > @@ -155,6 +158,9 @@ > > #define _ALTERNATIVE_CFG_2(old_c, ...) \ > > __ALTERNATIVE_CFG(old_c) > > > > +#define _ALTERNATIVE_CFG_3(old_c, ...) \ > > + __ALTERNATIVE_CFG(old_c) > > + > > #endif /* __ASSEMBLY__ */ > > #endif /* CONFIG_RISCV_ALTERNATIVE */ > > > > Else it fails (on riscv/for-next) with: > > > I'll include the above hunk in next version. Yes, those two hunks are in my example in [1] as well. [1] https://lore.kernel.org/all/20221129150053.50464-1-ajones@xxxxxxxxxxxxxxxx/ Thanks, drew > > > arch/riscv/mm/pmem.c: In function ‘arch_wb_cache_pmem’: > > arch/riscv/include/asm/alternative-macros.h:198:8: error: expected > > string literal before ‘_ALTERNATIVE_CFG_3’ > > 198 | _ALTERNATIVE_CFG_3(old_content, new_content_1, > > vendor_id_1, errata_id_1, CONFIG_k_1, \ > > | ^~~~~~~~~~~~~~~~~~ > > arch/riscv/include/asm/errata_list.h:128:14: note: in expansion of > > macro ‘ALTERNATIVE_3’ > > 128 | asm volatile(ALTERNATIVE_3( \ > > | ^~~~~~~~~~~~~ > > arch/riscv/mm/pmem.c:13:2: note: in expansion of macro ‘ALT_CMO_OP’ > > 13 | ALT_CMO_OP(clean, addr, size, riscv_cbom_block_size, 0, 0); > > | ^~~~~~~~~~ > > > > Gr{oetje,eeting}s, > > > > Geert > > > > -- > > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx > > > > In personal conversations with technical people, I call myself a hacker. But > > when I'm talking to journalists I just say "programmer" or something like that. > > -- Linus Torvalds
