On Wed, 2022-12-14 at 05:51 +0000, Hongxing Zhu wrote:
> Hi Lucas:
> Thanks a lot for your help about this series.
>
> Should the clocks of the pcie_phy should be changed as below when internal
> PLL is used as PCIe reference clock on i.MX8MP EVK board?
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -370,7 +370,7 @@ &i2c5 {
>
> &pcie_phy {
> fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> - clocks = <&pcie0_refclk>;
> + clocks = <&hsio_blk_ctrl>;
Yes, exactly. See e.g. also [1]. But don't forget to also change the fsl,refclk-pad-mode to
IMX8_PCIE_REFCLK_PAD_OUTPUT (;-p).
[1] https://lore.kernel.org/all/20221214061354.174072-1-marcel@xxxxxxxxxxxx/
> clock-names = "ref";
> status = "okay";
> };
>
> Best Regards
> Richard Zhu
>
> > -----Original Message-----
> > From: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> > Sent: 2022年12月14日 0:01
> > To: Rob Herring <robh+dt@xxxxxxxxxx>; Krzysztof Kozlowski
> > <krzysztof.kozlowski+dt@xxxxxxxxxx>; Shawn Guo <shawnguo@xxxxxxxxxx>;
> > Hongxing Zhu <hongxing.zhu@xxxxxxx>
> > Cc: dl-linux-imx <linux-imx@xxxxxxx>; Pengutronix Kernel Team
> > <kernel@xxxxxxxxxxxxxx>; Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>;
> > marex@xxxxxxx; tharvey@xxxxxxxxxxxxx; alexander.stein@xxxxxxxxxxxxxxx;
> > richard.leitner@xxxxxxxxx; lukas@xxxxxxxxx; patchwork-lst@xxxxxxxxxxxxxx;
> > devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> > Subject: [PATCH 1/4] dt-bindings: soc: imx8mp-hsio-blk-ctrl: add clock cells
> >
> > The HSIO blk-ctrl has a internal PLL, which can be used as a reference clock for
> > the PCIe PHY. Add clock-cells to the binding to allow the driver to expose this
> > PLL.
> >
> > Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> > ---
> > .../devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml
> > b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml
> > index c29181a9745b..1cc7c2bdf2bb 100644
> > ---
> > a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml
> > +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl
> > +++ .yaml
> > @@ -39,6 +39,9 @@ properties:
> > - const: pcie
> > - const: pcie-phy
> >
> > + '#clock-cells':
> > + const: 1
> > +
> > clocks:
> > minItems: 2
> > maxItems: 2
> > @@ -85,4 +88,5 @@ examples:
> > power-domain-names = "bus", "usb", "usb-phy1",
> > "usb-phy2", "pcie", "pcie-phy";
> > #power-domain-cells = <1>;
> > + #clock-cells = <0>;
> > };
> > --
> > 2.30.2
