On Thu, Dec 1, 2022 at 3:33 PM Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx> wrote: > > Add adsp power domain controller node for mt8192 SoC. > > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx> > --- > Ref: https://lore.kernel.org/all/2ec80bd8-dfef-d2e6-eb41-6e6088043e33@xxxxxxxxxxxxx/ > [Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx>] > --- > --- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 8 ++++++++ > include/dt-bindings/power/mt8192-power.h | 1 + > 2 files changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 424fc89cc6f7..e71afba871fc 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -514,6 +514,14 @@ > }; > }; > }; > + > + power-domain@MT8192_POWER_DOMAIN_ADSP { > + reg = <MT8192_POWER_DOMAIN_ADSP>; > + clocks = <&topckgen CLK_TOP_ADSP_SEL>; > + clock-names = "adsp"; > + mediatek,infracfg = <&infracfg>; > + #power-domain-cells = <0>; > + }; > }; > }; > Please also tie the new power domain to the SCP_ADSP clock. ChenYu > diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h > index 4eaa53d7270a..63e81cd0d06d 100644 > --- a/include/dt-bindings/power/mt8192-power.h > +++ b/include/dt-bindings/power/mt8192-power.h > @@ -28,5 +28,6 @@ > #define MT8192_POWER_DOMAIN_CAM_RAWA 18 > #define MT8192_POWER_DOMAIN_CAM_RAWB 19 > #define MT8192_POWER_DOMAIN_CAM_RAWC 20 > +#define MT8192_POWER_DOMAIN_ADSP 21 > > #endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */ > -- > 2.18.0 >
