> Subject: [PATCH 3/5] arm64: dts: imx8m: Document the fuse address
> calculation
>
> The mapping from OCOTP reg DT property to Fusemap Descriptions Table in
> the datasheet is often unclear. Add a comment to make it easier to find out
> how it works. No functional change.
>
> Signed-off-by: Marek Vasut <marex@xxxxxxx>
Reviewed-by: Peng Fan <peng.fan@xxxxxxx>
> ---
> Cc: Adam Ford <aford173@xxxxxxxxx>
> Cc: Alice Guo <alice.guo@xxxxxxx>
> Cc: Amit Kucheria <amitk@xxxxxxxxxx>
> Cc: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>
> Cc: Fabio Estevam <festevam@xxxxxxxxx>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
> Cc: Li Jun <jun.li@xxxxxxx>
> Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> Cc: Markus Niebel <Markus.Niebel@xxxxxxxxxxxxxxx>
> Cc: NXP Linux Team <linux-imx@xxxxxxx>
> Cc: Peng Fan <peng.fan@xxxxxxx>
> Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>
> Cc: Rafael J. Wysocki <rafael@xxxxxxxxxx>
> Cc: Richard Cochran <richardcochran@xxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
> Cc: Zhang Rui <rui.zhang@xxxxxxxxx>
> Cc: devicetree@xxxxxxxxxxxxxxx
> To: linux-pm@xxxxxxxxxxxxxxx
> To: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 19 ++++++++++++++++---
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 19 ++++++++++++++++---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 21 +++++++++++++++++----
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 19 ++++++++++++++++---
> 4 files changed, 65 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 423cb36cbcd53..513c2de0caa15 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -563,15 +563,28 @@ ocotp: efuse@30350000 {
> #address-cells = <1>;
> #size-cells = <1>;
>
> - imx8mm_uid: unique-id@4 {
> + /*
> + * The register address below maps to the
> MX8M
> + * Fusemap Description Table entries this way.
> + * Assuming
> + * reg = <ADDR SIZE>;
> + * then
> + * Fuse Address = (ADDR * 4) + 0x400
> + * Note that if SIZE is greater than 4, then
> + * each subsequent fuse is located at offset
> + * +0x10 in Fusemap Description Table (e.g.
> + * reg = <0x4 0x8> describes fuses 0x410 and
> + * 0x420).
> + */
> + imx8mm_uid: unique-id@4 { /* 0x410-0x420
> */
> reg = <0x4 0x8>;
> };
>
> - cpu_speed_grade: speed-grade@10 {
> + cpu_speed_grade: speed-grade@10 { /*
> 0x440 */
> reg = <0x10 4>;
> };
>
> - fec_mac_address: mac-address@90 {
> + fec_mac_address: mac-address@90 { /*
> 0x640 */
> reg = <0x90 6>;
> };
> };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 312e3abc35ea8..068f599cdf757 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -564,15 +564,28 @@ ocotp: efuse@30350000 {
> #address-cells = <1>;
> #size-cells = <1>;
>
> - imx8mn_uid: unique-id@4 {
> + /*
> + * The register address below maps to the
> MX8M
> + * Fusemap Description Table entries this way.
> + * Assuming
> + * reg = <ADDR SIZE>;
> + * then
> + * Fuse Address = (ADDR * 4) + 0x400
> + * Note that if SIZE is greater than 4, then
> + * each subsequent fuse is located at offset
> + * +0x10 in Fusemap Description Table (e.g.
> + * reg = <0x4 0x8> describes fuses 0x410 and
> + * 0x420).
> + */
> + imx8mn_uid: unique-id@4 { /* 0x410-0x420 */
> reg = <0x4 0x8>;
> };
>
> - cpu_speed_grade: speed-grade@10 {
> + cpu_speed_grade: speed-grade@10 { /*
> 0x440 */
> reg = <0x10 4>;
> };
>
> - fec_mac_address: mac-address@90 {
> + fec_mac_address: mac-address@90 { /*
> 0x640 */
> reg = <0x90 6>;
> };
> };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index c9459ed21b243..ddcd5e23ba47d 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -426,19 +426,32 @@ ocotp: efuse@30350000 {
> #address-cells = <1>;
> #size-cells = <1>;
>
> - imx8mp_uid: unique-id@8 {
> + /*
> + * The register address below maps to the
> MX8M
> + * Fusemap Description Table entries this way.
> + * Assuming
> + * reg = <ADDR SIZE>;
> + * then
> + * Fuse Address = (ADDR * 4) + 0x400
> + * Note that if SIZE is greater than 4, then
> + * each subsequent fuse is located at offset
> + * +0x10 in Fusemap Description Table (e.g.
> + * reg = <0x8 0x8> describes fuses 0x420 and
> + * 0x430).
> + */
> + imx8mp_uid: unique-id@8 { /* 0x420-0x430 */
> reg = <0x8 0x8>;
> };
>
> - cpu_speed_grade: speed-grade@10 {
> + cpu_speed_grade: speed-grade@10 { /*
> 0x440 */
> reg = <0x10 4>;
> };
>
> - eth_mac1: mac-address@90 {
> + eth_mac1: mac-address@90 { /* 0x640 */
> reg = <0x90 6>;
> };
>
> - eth_mac2: mac-address@96 {
> + eth_mac2: mac-address@96 { /* 0x658 */
> reg = <0x96 6>;
> };
> };
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 2b6d3f4ff5d93..8a2ec90b493d9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -593,15 +593,28 @@ ocotp: efuse@30350000 {
> #address-cells = <1>;
> #size-cells = <1>;
>
> - imx8mq_uid: soc-uid@4 {
> + /*
> + * The register address below maps to the
> MX8M
> + * Fusemap Description Table entries this way.
> + * Assuming
> + * reg = <ADDR SIZE>;
> + * then
> + * Fuse Address = (ADDR * 4) + 0x400
> + * Note that if SIZE is greater than 4, then
> + * each subsequent fuse is located at offset
> + * +0x10 in Fusemap Description Table (e.g.
> + * reg = <0x4 0x8> describes fuses 0x410 and
> + * 0x420).
> + */
> + imx8mq_uid: soc-uid@4 { /* 0x410-0x420 */
> reg = <0x4 0x8>;
> };
>
> - cpu_speed_grade: speed-grade@10 {
> + cpu_speed_grade: speed-grade@10 { /*
> 0x440 */
> reg = <0x10 4>;
> };
>
> - fec_mac_address: mac-address@90 {
> + fec_mac_address: mac-address@90 { /*
> 0x640 */
> reg = <0x90 6>;
> };
> };
> --
> 2.35.1
