On 17/11/2022 17:14, Geert Uytterhoeven wrote:
Hi Tomi, On Thu, Nov 17, 2022 at 1:26 PM Tomi Valkeinen <tomi.valkeinen@xxxxxxxxxxxxxxxx> wrote:From: Tomi Valkeinen <tomi.valkeinen+renesas@xxxxxxxxxxxxxxxx> Extend the Renesas DSI display bindings to support the r8a779g0 V4H. Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@xxxxxxxxxxxxxxxx> --- .../bindings/display/bridge/renesas,dsi-csi2-tx.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml index afeeb967393d..bc3101f77e5a 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml @@ -11,13 +11,14 @@ maintainers: description: | This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas - R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up + R-Car V3U/V4H SoC. The encoder can operate in either DSI or CSI-2 mode, with upPerhaps "R-Car Gen4 SoCs", so we stay within 80 chars, and don't have to update this when the next member of the family is around the block?
Is V3U gen 4? Or do you mean "R-Car V3U and Gen 4 SoCs"?
Is there anything that might be SoC-specific? If not, perhaps the time is ripe for a family-specific compatible value?
At least v3u and v4h DSIs are slightly different. Well, the DSI IP block itself looks the same, but the PLL and PHY are different.
Tomi
