Hi Peter On Thu, 17 Nov 2022 at 02:06, Peter Geis <pgwipeout@xxxxxxxxx> wrote: > > On Wed, Nov 16, 2022 at 3:02 PM Anand Moon <linux.amoon@xxxxxxxxx> wrote: > > > > On rk356x ethernet phy support reduced media independent interface (RMII) > > and reduced gigabit media independent interface (RGMII). > > So set the phy mode to rgmii to support clock delay, also > > add TX and RX delay for phy-mode. > > Controller based clock delay, the various rgmii-id modes (rgmii-txid > and rgmii-rxid are also valid) apply the delays in the phy. They are > usually at a fixed amount, but some phys support variable delays. > > You want your commit message to accurately describe the problem, such > as "In rgmii-id mode, the phy on the rock-3a is unreliable due to > incorrect delays. Switch to rgmii mode in order to handle the delays > in the controller." > > > > > Fix following warning > > > > [ 7.365215] rk_gmac-dwmac fe010000.ethernet: Can not read property: tx_delay. > > [ 7.365219] rk_gmac-dwmac fe010000.ethernet: set tx_delay to 0x30 > > [ 7.365224] rk_gmac-dwmac fe010000.ethernet: Can not read property: rx_delay. > > [ 7.365228] rk_gmac-dwmac fe010000.ethernet: set rx_delay to 0x10 > > I've been meaning to make this a dev_debug message, because in the > various rgmii-id modes it is feasible for these to be non-existent in > the device-tree. In rgmii-id mode these are disabled, no matter what > they are set to in the dt. As per the public datasheet share by Radxa below [0] https://dl.radxa.com/rock3/docs/hw/datasheet/RTL8211F-CG-Datasheet.pdf This Ethernet controller supports RGMII mode. > > > > > Signed-off-by: Anand Moon <linux.amoon@xxxxxxxxx> > > --- > > V2: Fix commit message and added the RX and TX clock delay. > > --- > > arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts > > index ea74ba32fbbd..e1c75532dcee 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts > > +++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts > > @@ -253,13 +253,16 @@ &gmac1 { > > assigned-clock-rates = <0>, <125000000>; > > clock_in_out = "output"; > > phy-handle = <&rgmii_phy1>; > > - phy-mode = "rgmii-id"; > > + phy-mode = "rgmii"; > > pinctrl-names = "default"; > > pinctrl-0 = <&gmac1m1_miim > > &gmac1m1_tx_bus2 > > &gmac1m1_rx_bus2 > > &gmac1m1_rgmii_clk > > &gmac1m1_rgmii_bus>; > > + > > + tx_delay = <0x4f>; > > + rx_delay = <0x26>; > > These are pretty far off from the default, have you verified the upper > and lower bounds for the rock-3a? These should be roughly in the > middle of that range. > No I have not tested this way but as per the datasheet, it supports TXDLY Add 2ns delay to RXC for RXD latching (via 4.7k-ohm to DVDD_RG) RXDLY Add 2ns delay to RXC for RXD latching (via 4.7k-ohm to DVDD_RG) I feel I should ignore the above warning and add it below. rx-internal-delay-ps = <2000>; tx-internal-delay-ps = <2000>; Thanks -Anand > > status = "okay"; > > }; > > > > -- > > 2.38.1 > >
