Re: [PATCH v5 1/2] soc: loongson: add GUTS driver for loongson-2 platforms

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On Thu, Nov 3, 2022, at 09:19, Yinbo Zhu wrote:
> The global utilities block controls PCIE device enabling, alternate
> function selection for multiplexed signals, consistency of HDA, USB
> and PCIE, configuration of memory controller, rtc controller, lio
> controller, and clock control.
>
> This patch adds a driver to manage and access global utilities block
> for loongarch architecture Loongson-2 SoCs. Initially only reading SVR
> and registering soc device are supported. Other guts accesses, such
> as reading PMON configuration by default, should eventually be added
> into this driver as well.
>
> Signed-off-by: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>

Looks ok to me. I can take the new driver through the SoC tree,
so please send it to soc@xxxxxxxxxx once there are no more
remaining review comments that need to be addressed.

One last thing from my side, with that addressed, please add my

Reviewed-by: Arnd Bergmann <arnd@xxxxxxxx>

> +config LOONGSON2_GUTS
> +	tristate "Loongson-2 GUTS"
> +	depends on LOONGARCH || COMPILE_TEST
> +	select SOC_BUS

In the one-line description, please spell out GUTS, since this
is not a generic term but apparently is something that is only
used on Loongarch and Layerscape.

Just for clarification: is this derived from the same IP block
that NXP are using, or is this just coincidentally named
similarly?

      Arnd



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