On 22-10-24, Peng Fan (OSS) wrote:
> From: Clark Wang <xiaoning.wang@xxxxxxx>
>
> Enable pwm1/2/4 support.
> Enable pwm1 on pin GPIO1_IO01 for DSI_BL_PWM
> pwm2 on pin GPIO1_IO11 for LVDS_BL_PWM
> pwm4 on pin SAI5_RXFS for J21-32
>
> Acked-by: Fugang Duan <fugang.duan@xxxxxxx>
> Signed-off-by: Clark Wang <xiaoning.wang@xxxxxxx>
> Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
LGTM, feel free to add my:
Reviewed-by: Marco Felsch <m.felsch@xxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 36 ++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index a4cddc5a8620..316390f917a4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -406,6 +406,24 @@ &pcie {
> status = "okay";
> };
>
> +&pwm1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm1>;
> + status = "okay";
> +};
> +
> +&pwm2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm2>;
> + status = "okay";
> +};
> +
> +&pwm4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm4>;
> + status = "okay";
> +};
> +
> &snvs_pwrkey {
> status = "okay";
> };
> @@ -583,6 +601,24 @@ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* Input pull-up. */
> >;
> };
>
> + pinctrl_pwm1: pwm1grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x116
> + >;
> + };
> +
> + pinctrl_pwm2: pwm2grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT 0x116
> + >;
> + };
> +
> + pinctrl_pwm4: pwm4grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI5_RXFS__PWM4_OUT 0x116
> + >;
> + };
> +
> pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
> fsl,pins = <
> MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
> --
> 2.37.1
>
>
>
