Re: [PATCH v2 3/6] clk: ingenic: Add .set_rate_hook() for PLL clocks

[Stephen Boyd <sboyd@xxxxxxxxxx>]

Quoting Aidan MacDonald (2022-10-26 12:43:42)
> The set rate hook is called immediately after updating the clock
> register but before the spinlock is released. This allows another
> register to be updated alongside the main one, which is needed to
> handle the I2S divider on some SoCs.
> 
> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@xxxxxxxxx>
> ---

Applied to clk-next