On 27/10/2022 15:34, Robert Foss wrote:
All SoC supported by this driver supports the RETAIN_FF_ENABLE flag, so it should be enabled here. This feature enables registers to maintain their state after dis/re-enabling the GDSC. Signed-off-by: Robert Foss <robert.foss@xxxxxxxxxx> --- drivers/clk/qcom/dispcc-sm8250.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> -- With best wishes Dmitry
