Re: [PATCHv3] arm64: dts: meson: Enable active coling using gpio-fan on Odroid N2/N2+

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Hi,

On 25/10/2022 20:06, Anand Moon wrote:
Hi Martin,

On Sat, 22 Oct 2022 at 17:22, Martin Blumenstingl
<martin.blumenstingl@xxxxxxxxxxxxxx> wrote:

Hi Anand,

On Sat, Oct 22, 2022 at 1:27 PM Anand Moon <linux.amoon@xxxxxxxxx> wrote:
[...]
@@ -1982,7 +1982,6 @@ pwm_ao_d_10_pins: pwm-ao-d-10 {
                                                 mux {
                                                         groups = "pwm_ao_d_10";
                                                         function = "pwm_ao_d";
-                                                       bias-disable;
&pwm_ao_d_10_pins is not referenced anywhere so it seems that this
change has no impact on controlling the fan on Odroid-N2(+).
How did you test this change?

Ok I felt these changes affect the behavior of the pinctrl

   * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
  *  transition from say pull-up to pull-down implies that you disable
  *  pull-up in the process, this setting disables all biasing.

I mapped this is linked in pinctrl driver, pwm_ao_d_10_pins GPIOAO_10 see below
Yes, I understand this part.
My concern is: &pwm_ao_d_10_pins settings only become active when this
node is actively referenced. You can even see it in your output
below...

[...]
pin 10 (GPIOAO_10): (MUX UNCLAIMED) aobus-banks:1958
This shows that it's used as a GPIO. If the &pwm_ao_d_10_pins setting
was used then it would show "function pwm_ao_d group pwm_ao_d_10"
(similar to what GPIOE_1 shows in your output)

If you want to know if a pull-up/down is enabled you can look at the output of:
$ cat /sys/kernel/debug/pinctrl/ff800000.sys-ctrl\:pinctrl@14-pinctrl-meson/pinconf-pins
(I'm sure this can also be retrieved from some userspace tools, but I
don't know how)


I now switch using pwm-fan with the local changes I am able to link
pwm_ao_d_10_pins
but now the issue is fan keeps on spinning on boot-up and stays on.

I can manually turn on off by using
$ sudo gpioset gpiochip1 10=1   // fan on
$ sudo gpioset gpiochip1 10=0   // fan off

By doing that actually override the PWM function of the pin and set it as a GPIO.


It is not controlled by the thermal tip as expected.
I feel some configuration is missing in pwm-meson driver.
Any input for me?

$ sudo cat /sys/kernel/debug/pinctrl/ff800000.sys-ctrl\:pinctrl@14-pinctrl-meson/pinmux-pins
[sudo] password for alarm:
Pinmux settings per pin
Format: pin (name): mux_owner gpio_owner hog?
pin 0 (GPIOAO_0): ff803000.serial (GPIO UNCLAIMED) function uart_ao_a
group uart_ao_a_tx
pin 1 (GPIOAO_1): ff803000.serial (GPIO UNCLAIMED) function uart_ao_a
group uart_ao_a_rx
pin 2 (GPIOAO_2): (MUX UNCLAIMED) aobus-banks:1950
pin 3 (GPIOAO_3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 4 (GPIOAO_4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 5 (GPIOAO_5): ff808000.ir (GPIO UNCLAIMED) function
remote_ao_input group remote_ao_input
pin 6 (GPIOAO_6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 7 (GPIOAO_7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 8 (GPIOAO_8): (MUX UNCLAIMED) aobus-banks:1956
pin 9 (GPIOAO_9): (MUX UNCLAIMED) aobus-banks:1957
pin 10 (GPIOAO_10): ff807000.pwm (GPIO UNCLAIMED) function pwm_ao_d
group pwm_ao_d_10
pin 11 (GPIOAO_11): (MUX UNCLAIMED) aobus-banks:1959
pin 12 (GPIOE_0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 13 (GPIOE_1): ff802000.pwm (GPIO UNCLAIMED) function pwm_ao_d
group pwm_ao_d_e
pin 14 (GPIOE_2): ffd1b000.pwm (GPIO UNCLAIMED) function pwm_a_e group pwm_a_e

$ sudo cat /sys/kernel/debug/pwm
platform/ffd1b000.pwm, 2 PWM devices
  pwm-0   (regulator-vddcpu-a  ): requested enabled period: 1250 ns
duty: 838 ns polarity: normal
  pwm-1   ((null)              ): period: 0 ns duty: 0 ns polarity: normal

platform/ff807000.pwm, 2 PWM devices
  pwm-0   (pwm-fan             ): requested period: 1250 ns duty: 0 ns
polarity: normal
  pwm-1   ((null)              ): period: 0 ns duty: 0 ns polarity: normal

This should be on the pwm-1, hence the "pwm_AO_cd" name, "c" and "d" and the
names of the outputs.

So you need to use 1 as first PWM phandle argument instead of 0.


platform/ff802000.pwm, 2 PWM devices
  pwm-0   ((null)              ): period: 0 ns duty: 0 ns polarity: normal
  pwm-1   (regulator-vddcpu-b  ): requested enabled period: 1250 ns
duty: 1213 ns polarity: normal

I could observe a change in duty when we have stress testing the CPU.

Can you share the complete change you did here ?


Thanks

-Anand

Neil



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