On 24/10/2022 00:39, Hector Martin wrote: > This binding represents the cpufreq/DVFS hardware present in Apple SoCs. > The hardware has an independent controller per CPU cluster, and we > represent them as unique nodes in order to accurately describe the > hardware. The driver is responsible for binding them as a single cpufreq > device (in the Linux cpufreq model). > > Signed-off-by: Hector Martin <marcan@xxxxxxxxx> > --- > .../cpufreq/apple,cluster-cpufreq.yaml | 119 ++++++++++++++++++ > 1 file changed, 119 insertions(+) > create mode 100644 Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml > > diff --git a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml > new file mode 100644 > index 000000000000..b11452f91468 > --- /dev/null > +++ b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml > @@ -0,0 +1,119 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Apple SoC cluster cpufreq device Few nits, in general looks fine to me. > + > +maintainers: > + - Hector Martin <marcan@xxxxxxxxx> > + > +description: | > + Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of > + the cluster management register block. This binding uses the standard > + operating-points-v2 table to define the CPU performance states, with the > + opp-level property specifying the hardware p-state index for that level. > + > +properties: > + compatible: > + oneOf: > + - items: > + - const: apple,t8103-cluster-cpufreq > + - const: apple,cluster-cpufreq > + - items: > + - const: apple,t6000-cluster-cpufreq > + - const: apple,t8103-cluster-cpufreq > + - const: apple,cluster-cpufreq > + - items: > + - const: apple,t8112-cluster-cpufreq With the first one (t8103) - it's an enum. > + - const: apple,cluster-cpufreq > + > + reg: > + maxItems: 1 > + description: The register region for this CPU cluster DVFS controller Drop description, quite obvious. > + > + '#performance-domain-cells': > + const: 0 > + > +required: > + - compatible > + - reg > + - '#performance-domain-cells' > + > +additionalProperties: false > + > +examples: > + - | > + // This example shows a single CPU per domain and 2 domains, > + // with two p-states per domain. > + // Shipping hardware has 2-4 CPUs per domain and 2-6 domains. > + cpus { > + #address-cells = <2>; > + #size-cells = <0>; > + > + cpu@0 { > + compatible = "apple,icestorm"; > + device_type = "cpu"; > + reg = <0x0 0x0>; > + operating-points-v2 = <&ecluster_opp>; > + performance-domains = <&cpufreq_e>; > + }; > + > + cpu@10100 { > + compatible = "apple,firestorm"; > + device_type = "cpu"; > + reg = <0x0 0x10100>; > + operating-points-v2 = <&pcluster_opp>; > + performance-domains = <&cpufreq_p>; > + }; > + }; > + > + ecluster_opp: opp-table-0 { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp01 { > + opp-hz = /bits/ 64 <600000000>; > + opp-level = <1>; > + clock-latency-ns = <7500>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <972000000>; > + opp-level = <2>; > + clock-latency-ns = <22000>; > + }; > + }; > + > + pcluster_opp: opp-table-1 { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp01 { > + opp-hz = /bits/ 64 <600000000>; > + opp-level = <1>; > + clock-latency-ns = <8000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <828000000>; > + opp-level = <2>; > + clock-latency-ns = <19000>; > + }; > + }; > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpufreq_e: cpufreq@210e20000 { Node name: performance-controller (cpufreq is rather Linux naming) > + compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; > + reg = <0x2 0x10e20000 0 0x1000>; > + #performance-domain-cells = <0>; > + }; > + > + cpufreq_p: cpufreq@211e20000 { The same. > + compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; > + reg = <0x2 0x11e20000 0 0x1000>; > + #performance-domain-cells = <0>; > + }; > + }; Best regards, Krzysztof
