RE: [PATCH 00/13] Remove unused microblaze PCIe bus architecture

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> -----Original Message-----
> From: Simek, Michal <michal.simek@xxxxxxx>
> Sent: Tuesday, October 25, 2022 2:53 PM
> To: Havalige, Thippeswamy <thippeswamy.havalige@xxxxxxx>; linux-
> pci@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; krzysztof.kozlowski@xxxxxxxxxx
> Cc: bhelgaas@xxxxxxxxxx; michals@xxxxxxxxxx; robh+dt@xxxxxxxxxx;
> lorenzo.pieralisi@xxxxxxx; Gogada, Bharat Kumar
> <bharat.kumar.gogada@xxxxxxx>
> Subject: Re: [PATCH 00/13] Remove unused microblaze PCIe bus architecture
> 
> 
> 
> On 10/25/22 10:26, Havalige, Thippeswamy wrote:
> > Hi,
> >> -----Original Message-----
> >> From: Simek, Michal <michal.simek@xxxxxxx>
> >> Sent: Tuesday, October 25, 2022 1:02 PM
> >> To: Havalige, Thippeswamy <thippeswamy.havalige@xxxxxxx>; linux-
> >> pci@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> >> devicetree@xxxxxxxxxxxxxxx; krzysztof.kozlowski@xxxxxxxxxx
> >> Cc: bhelgaas@xxxxxxxxxx; michals@xxxxxxxxxx; robh+dt@xxxxxxxxxx;
> >> lorenzo.pieralisi@xxxxxxx; Gogada, Bharat Kumar
> >> <bharat.kumar.gogada@xxxxxxx>
> >> Subject: Re: [PATCH 00/13] Remove unused microblaze PCIe bus
> >> architecture
> >>
> >> Hi,
> >>
> >> On 10/25/22 08:52, Thippeswamy Havalige wrote:
> >>> The current Xilinx AXI PCIe Host Bridge driver uses generic PCIe
> >>> subsystem framework. This driver works on both Microblaze and Zynq
> >>> architecture based platforms.
> >>>
> >>> The microblaze architecture specific code has unused PCIe host
> >>> bridge supported API's which are no longer needed.
> >>>
> >>> This series of patch removes unused architecture specific microblaze
> >>> PCIe code.
> >>>
> >>> Thippeswamy Havalige (13):
> >>>     microblaze/PCI: Remove unused early_read_config_byte() et al
> >>>       declarations
> >>>     microblaze/PCI: Remove Null PCI config access unused functions
> >>>     microblaze/PCI: Remove unused PCI bus scan if configured as a host
> >>>     microblaze/PCI: Remove unused PCI legacy IO's access on a bus
> >>>     microblaze/PCI: Remove unused device tree parsing for a host bridge
> >>>       resources
> >>>     microblaze/PCI: Remove unused allocation & free of PCI host bridge
> >>>       structure
> >>>     microblaze/PCI: Remove unused PCI BIOS resource allocation
> >>>     microblaze/PCI: Remove unused PCI Indirect ops
> >>>     microblaze/PCI: Remove unused pci_address_to_pio() conversion of
> CPU
> >>>       address to I/O port
> >>>     microblaze/PCI: Remove unused sys_pciconfig_iobase() and et al
> >>>       declaration
> >>>     microblaze/PCI: Remove unused pci_iobar_pfn() and et al declarations
> >>>     microblaze/PCI: Remove support for Xilinx PCI host bridge
> >>>     microblaze/PCI: Moving PCI iounmap and dependent code
> >>>
> >>>    arch/microblaze/Kconfig                  |    8 -
> >>>    arch/microblaze/include/asm/pci-bridge.h |   92 ---
> >>>    arch/microblaze/include/asm/pci.h        |   29 -
> >>>    arch/microblaze/pci/Makefile             |    3 +-
> >>>    arch/microblaze/pci/indirect_pci.c       |  158 -----
> >>>    arch/microblaze/pci/iomap.c              |   36 +
> >>>    arch/microblaze/pci/pci-common.c         | 1067 ------------------------------
> >>>    arch/microblaze/pci/xilinx_pci.c         |  170 -----
> >>>    8 files changed, 37 insertions(+), 1526 deletions(-)
> >>>    delete mode 100644 arch/microblaze/pci/indirect_pci.c
> >>>    delete mode 100644 arch/microblaze/pci/pci-common.c
> >>>    delete mode 100644 arch/microblaze/pci/xilinx_pci.c
> >>>
> >>
> >> Why are you sending it again?
> >>
> >> M
> >
> >
> > Last time mails were not delivered to opensource maintainers due to some
> access permissions.
> 
> But people in TO/CC got it. It means you should send it as RESEND or v2 to
> avoid confusion.
> 
> Thanks,
> Michal
Hi Michal,

Check this link, I could only see the patches were listed that are sent today, initially I had some issue or permission issues to send mails outside AMD.
https://patchwork.ozlabs.org/project/linux-pci/list/

Regards,
Thippeswamy H 




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