The first three patches of this series modify the Ingenic CGU driver to allow the X1000's I2S divider to be modeled as a PLL clock. This is not really true -- it's just a fractional divider -- but doing it this way maximizes code reuse and avoids the need for a custom clock. (Thanks to Zhou Yanjie & Paul Cercueil for the idea.) The last two patches actually add the X1000 SoC's audio clocks. Aidan MacDonald (5): clk: ingenic: Make PLL clock "od" field optional clk: ingenic: Make PLL clock enable_bit and stable_bit optional clk: ingenic: Add .set_rate_hook() for PLL clocks dt-bindings: ingenic,x1000-cgu: Add audio clocks clk: ingenic: Add X1000 audio clocks drivers/clk/ingenic/cgu.c | 45 +++++++++--- drivers/clk/ingenic/cgu.h | 17 +++-- drivers/clk/ingenic/x1000-cgu.c | 69 +++++++++++++++++++ include/dt-bindings/clock/ingenic,x1000-cgu.h | 4 ++ 4 files changed, 120 insertions(+), 15 deletions(-) -- 2.38.1
