Hi Michal,
I plan to send a pull request for the series soon. Patches 01/37 to
35/37 will go through the DRM tree. How would you like to handle this
patch and the next ? They depend on the DT binding changes in 01/37.
On Thu, Sep 29, 2022 at 01:47:18AM +0300, Laurent Pinchart wrote:
> The DPSUB DT bindings now specify ports to model the connections with
> the programmable logic and the DisplayPort output. Add them to the
> device tree.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index a549265e55f6..307c76cd8544 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -930,6 +930,30 @@ zynqmp_dpsub: display@fd4a0000 {
> <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO1>,
> <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO2>,
> <&zynqmp_dpdma ZYNQMP_DPDMA_GRAPHICS>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + };
> + port@1 {
> + reg = <1>;
> + };
> + port@2 {
> + reg = <2>;
> + };
> + port@3 {
> + reg = <3>;
> + };
> + port@4 {
> + reg = <4>;
> + };
> + port@5 {
> + reg = <5>;
> + };
> + };
> };
> };
> };
--
Regards,
Laurent Pinchart
