On Thu, Sep 29, 2022 at 04:50:43PM +0100, Robin Murphy wrote: > On 2022-09-29 15:04, Johan Jonker wrote: > > The Rockchip rk3288 SoC has 4-built-in PWM channels. > > > > Configurable to operate in capture mode. > > Measures the high/low polarity effective cycles of this input waveform > > Generates a single interrupt at the transition of input waveform polarity > > > > Configurable to operate in continuous mode or one-shot mode. > > One-shot operation will produce N + 1 periods of the waveform, > > where N is the repeat counter value, and generates a single interrupt at > > the end of operation. > > Continuous mode generates the waveform continuously and > > do not generates any interrupts. > > > > Add interrupts property to rk3288 PWM nodes. > > As far as I can make out from the TRM, these are only valid when > GRF_SOC_CON2[0] = 0, otherwise it's in "new" RK_PWM mode using SPI 78 for > all channels. Which apparently will be the case for anyone using upstream > U-Boot: > > https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-rockchip/rk3288/rk3288.c#L83 Huh, so it depends on a (software) setting which irqs are in use? So the patch isn't correct as is, but I have no idea how to make it right. Should we rely on the bootloader to fixup the dtb correctly? Anyhow, I'm marking the patch as 'changes-requested' in our patchwork instance. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-König | Industrial Linux Solutions | https://www.pengutronix.de/ |
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