Hello Rob, On 18/10/22 19:02, Rob Herring wrote: > On Tue, 18 Oct 2022 14:28:08 +0530, Siddharth Vadapalli wrote: >> Update bindings for TI K3 J721e SoC which contains 9 ports (8 external >> ports) CPSW9G module and add compatible for it. >> >> Changes made: >> - Add new compatible ti,j721e-cpswxg-nuss for CPSW9G. >> - Extend pattern properties for new compatible. >> - Change maximum number of CPSW ports to 8 for new compatible. >> >> Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx> >> --- >> .../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 23 +++++++++++++++++-- >> 1 file changed, 21 insertions(+), 2 deletions(-) >> > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > ./Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml:196:25: [error] syntax error: mapping values are not allowed here (syntax) I will fix the errors in the v3 series and ensure that there are no errors or warnings with dt_binding_check, using the updated dt-schema and yamllint. Regards, Siddharth.
