Hello Rob, On 18/10/22 19:02, Rob Herring wrote: > On Tue, 18 Oct 2022 14:13:31 +0530, Siddharth Vadapalli wrote: >> TI's J721e SoC supports additional PHY modes like QSGMII and SGMII >> that are not supported on earlier SoCs. Add a compatible for it. >> >> Extend ti,qsgmii-main-ports property to support selection of upto >> two main ports at once across the two QSGMII interfaces. >> >> Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx> >> --- >> .../bindings/phy/ti,phy-gmii-sel.yaml | 48 +++++++++++++++---- >> 1 file changed, 40 insertions(+), 8 deletions(-) >> > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > ./Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml:75:12: [error] syntax error: mapping values are not allowed here (syntax) I will fix the errors in the v3 series and ensure that there are no errors or warnings with dt_binding_check, using the updated dt-schema and yamllint. Regards, Siddharth.
