On 30/09/2022 00:26, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@xxxxxxxx>
>
> Add bindings for the system clock generator on the JH7110
> RISC-V SoC by StarFive Technology Ltd.
>
> Signed-off-by: Emil Renner Berthing <kernel@xxxxxxxx>
> Signed-off-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxxxxxxxx>
(...)
> + '#clock-cells':
> + const: 1
> + description:
> + See <dt-bindings/clock/starfive-jh7110-sys.h> for valid indices.
> +
> +required:
> + - compatible
> + - clocks
> + - clock-names
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscrg_clk: clock-controller@13020000 {
Does not look like you tested the bindings. Please run `make
dt_binding_check` (see
Documentation/devicetree/bindings/writing-schema.rst for instructions).
> + compatible = "starfive,jh7110-clkgen-sys";
> + clocks = <&osc>, <&gmac1_rmii_refin>,
> + <&gmac1_rgmii_rxin>,
> + <&i2stx_bclk_ext>, <&i2stx_lrck_ext>,
> + <&i2srx_bclk_ext>, <&i2srx_lrck_ext>,
> + <&tdm_ext>, <&mclk_ext>;
> + clock-names = "osc", "gmac1_rmii_refin",
> + "gmac1_rgmii_rxin",
> + "i2stx_bclk_ext", "i2stx_lrck_ext",
> + "i2srx_bclk_ext", "i2srx_lrck_ext",
> + "tdm_ext", "mclk_ext";
> + #clock-cells = <1>;
> + };
Best regards,
Krzysztof
