Re: [PATCH v2] dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML

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On Wed, Sep 21, 2022 at 8:45 AM Krzysztof Kozlowski
<krzysztof.kozlowski@xxxxxxxxxx> wrote:
>
> On 20/09/2022 07:24, Sergio Paracuellos wrote:
> > MIPS CPU interrupt controller bindings used text format, so migrate them
> > to YAML.
> >
> > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx>
> > ---
> > Changes in v2:
> > - Address review comment from Krzysztof:
> >     - Rebase onto last kernel version.
> >     - Add Thomas Bogendoerfer as maintainer since this is arch stuff.
> >     - Change compatible to go first as property and required.
> >     - Change sample node name to be generic. Use 'interrupt-controller'.
>
> Thank you for your patch. There is something to discuss/improve.
>
> >
> >  .../mti,cpu-interrupt-controller.yaml         | 46 ++++++++++++++++++
> >  .../devicetree/bindings/mips/cpu_irq.txt      | 47 -------------------
> >  2 files changed, 46 insertions(+), 47 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml
> >  delete mode 100644 Documentation/devicetree/bindings/mips/cpu_irq.txt
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml
> > new file mode 100644
> > index 000000000000..06dc65f0bbd2
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml
> > @@ -0,0 +1,46 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MIPS CPU Interrupt Controller bindings
>
> Drop bindings

Understood, wil drop.
>
> > +
> > +description: >
> > +   On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
> > +   IRQs from a devicetree file and create a irq_domain for IRQ controller.
> > +
> > +   With the irq_domain in place we can describe how the 8 IRQs are wired to the
> > +   platforms internal interrupt controller cascade.
> > +
> > +maintainers:
> > +  - Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx>
> > +
> > +properties:
> > +  compatible:
> > +    const: mti,cpu-interrupt-controller
> > +
> > +  '#interrupt-cells':
> > +    const: 1
> > +
> > +  '#address-cells':
> > +    const: 0
> > +
> > +  interrupt-controller: true
> > +
> > +additionalProperties: false
> > +
> > +required:
> > +  - compatible
> > +  - '#interrupt-cells'
> > +  - '#address-cells'
> > +  - interrupt-controller
> > +
> > +examples:
> > +  - |
> > +    interrupt-controller {
> > +      #address-cells = <0>;
> > +      #interrupt-cells = <1>;
> > +      interrupt-controller;
> > +      compatible = "mti,cpu-interrupt-controller";
>
> Put compatible first in list of properties. It's always first in DTS, by
> convention.

Ok, I will put it first. Current dts files in arch/mips/boot/ using
this do not follow this convention at all so my copy-paste for adding
the sample here ended up in the same mistake :)

Thanks,
    Sergio Paracuellos

>
> > +    };
>
>
>
> Best regards,
> Krzysztof



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