On 16/09/2022 06:34, Sergio Paracuellos wrote: > MIPS CPU interrupt controller bindings used text format, so migrate them > to YAML. > > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> You keep cc-ing not current address... > --- > .../mti,cpu-interrupt-controller.yaml | 46 ++++++++++++++++++ > .../devicetree/bindings/mips/cpu_irq.txt | 47 ------------------- > 2 files changed, 46 insertions(+), 47 deletions(-) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml > delete mode 100644 Documentation/devicetree/bindings/mips/cpu_irq.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml > new file mode 100644 > index 000000000000..2db2ec816534 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml > @@ -0,0 +1,46 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MIPS CPU Interrupt Controller bindings > + > +description: > > + On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU > + IRQs from a devicetree file and create a irq_domain for IRQ controller. > + > + With the irq_domain in place we can describe how the 8 IRQs are wired to the > + platforms internal interrupt controller cascade. > + > +maintainers: > + - Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> What about existing maintainers? > + > +properties: > + '#interrupt-cells': > + const: 1 > + > + '#address-cells': > + const: 0 > + > + compatible: > + const: mti,cpu-interrupt-controller Compatible goes first. > + > + interrupt-controller: true > + > +additionalProperties: false > + > +required: > + - '#interrupt-cells' > + - '#address-cells' > + - compatible compatible goes first. > + - interrupt-controller > + > +examples: > + - | > + cpuintc { Node names should be generic. https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation > + #address-cells = <0>; > + #interrupt-cells = <1>; > + interrupt-controller; > + compatible = "mti,cpu-interrupt-controller"; Best regards, Krzysztof
