[PATCH v1 0/3] Add a devicetree for the Aldec PolarFire SoC TySoM

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hey All,

On top of my other series adding the m100pfsevp and sevkit [0], here's
yet another development kit.. This time from Aldec.

The board has 32 GB of DDR but the DT I have access to only has a small
bit of that mapped.. until I know exactly what the mapping is, I will
not be applying this.

Thanks,
Conor.

0 - https://lore.kernel.org/all/20220901133403.3392291-1-conor.dooley@xxxxxxxxxxxxx/

Conor Dooley (3):
  dt-bindings: vendor-prefixes: Add entry for Aldec
  dt-bindings: riscv: microchip: document the Aldec TySoM
  riscv: dts: microchip: add a devicetree for the Aldec TySoM

 .../devicetree/bindings/riscv/microchip.yaml  |   1 +
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 arch/riscv/boot/dts/microchip/Makefile        |   1 +
 .../dts/microchip/mpfs-tysom-m-fabric.dtsi    |  47 +++++
 .../riscv/boot/dts/microchip/mpfs-tysom-m.dts | 168 ++++++++++++++++++
 5 files changed, 219 insertions(+)
 create mode 100644 arch/riscv/boot/dts/microchip/mpfs-tysom-m-fabric.dtsi
 create mode 100644 arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts

-- 
2.36.1




[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux