This would allow to migrate Orion PCIe code to pci-mvebu.c driver as this
driver reads mapping information from device tree files and does not relay
on static mappings.
Signed-off-by: Pali Rohár <pali@xxxxxxxxxx>
---
Changes in v3:
* Split it from pci-mvebu.c change to separate patch
---
arch/arm/mach-orion5x/common.c | 13 -------------
arch/arm/mach-orion5x/pci.c | 14 ++++++++++++++
2 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 2e711b7252c6..df5e7b237946 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -228,19 +228,6 @@ void __init orion5x_init_early(void)
void orion5x_setup_wins(void)
{
- /*
- * The PCIe windows will no longer be statically allocated
- * here once Orion5x is migrated to the pci-mvebu driver.
- */
- mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCIE_IO_TARGET,
- ORION_MBUS_PCIE_IO_ATTR,
- ORION5X_PCIE_IO_PHYS_BASE,
- ORION5X_PCIE_IO_SIZE,
- ORION5X_PCIE_IO_BUS_BASE);
- mvebu_mbus_add_window_by_id(ORION_MBUS_PCIE_MEM_TARGET,
- ORION_MBUS_PCIE_MEM_ATTR,
- ORION5X_PCIE_MEM_PHYS_BASE,
- ORION5X_PCIE_MEM_SIZE);
mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCI_IO_TARGET,
ORION_MBUS_PCI_IO_ATTR,
ORION5X_PCI_IO_PHYS_BASE,
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 888fdc9099c5..e0836be92f3f 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -147,6 +147,20 @@ static int __init pcie_setup(struct pci_sys_data *sys)
*/
orion_pcie_setup(PCIE_BASE);
+ /*
+ * The PCIe windows will no longer be statically allocated
+ * here once Orion5x is migrated to the pci-mvebu driver.
+ */
+ mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCIE_IO_TARGET,
+ ORION_MBUS_PCIE_IO_ATTR,
+ ORION5X_PCIE_IO_PHYS_BASE,
+ ORION5X_PCIE_IO_SIZE,
+ ORION5X_PCIE_IO_BUS_BASE);
+ mvebu_mbus_add_window_by_id(ORION_MBUS_PCIE_MEM_TARGET,
+ ORION_MBUS_PCIE_MEM_ATTR,
+ ORION5X_PCIE_MEM_PHYS_BASE,
+ ORION5X_PCIE_MEM_SIZE);
+
/*
* Check whether to apply Orion-1/Orion-NAS PCIe config
* read transaction workaround.
--
2.20.1
