Re: [PATCH v2 0/3] omap-gpmc wait pin additions

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On 02/09/2022 12:10, B. Niedermayr wrote:
> From: Benedikt Niedermayr <benedikt.niedermayr@xxxxxxxxxxx>
> 
> There is currently no possibility for the gpmc to set either the
> waitp-pin polarity or use the same wait-pin for different cs-regions.
> 
> While the current implementation may fullfill most usecases, it may not
> be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), where
> more complex interfacing options where possible.
> 
> For example interfacing an ASIC which offers multiple cs-regions but
> only one waitpin the current driver and dt-bindings are not sufficient.
> 
> While using the same waitpin for different cs-regions worked for older
> kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) with
> newer kernels (>5.10).
> 
> Changes since v1: 
>   * Rebase against recent 6.0.0-rc3 kernel, but the maintainers list
>     stays the same!

No... thanks for rebasing yet still you use wrong address email.

> 
>   ./scripts/get_maintainer.pl drivers/memory/omap-gpmc.c
>   Roger Quadros <rogerq@xxxxxxxxxx> (maintainer:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT)
>   Tony Lindgren <tony@xxxxxxxxxxx> (maintainer:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT)
>   Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> (maintainer:MEMORY CONTROLLER DRIVERS)

Different address email.


Best regards,
Krzysztof



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