Re: [PATCH 2/2] clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1

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Subject: Re: [PATCH 2/2] clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1
From: Stephen Boyd <sboyd@xxxxxxxxxx>
Date: Wed, 31 Aug 2022 18:14:21 -0700
Cc: matthias.bgg@xxxxxxxxx, p.zabel@xxxxxxxxxxxxxx, robh+dt@xxxxxxxxxx, krzysztof.kozlowski+dt@xxxxxxxxxx, angelogioacchino.delregno@xxxxxxxxxxxxx, wenst@xxxxxxxxxxxx, chun-jie.chen@xxxxxxxxxxxx, miles.chen@xxxxxxxxxxxx, rex-bc.chen@xxxxxxxxxxxx, linux-clk@xxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, linux-mediatek@xxxxxxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx
In-reply-to: <20220629105205.173471-3-angelogioacchino.delregno@collabora.com>
User-agent: alot/0.10

Quoting AngeloGioacchino Del Regno (2022-06-29 03:52:05)
> Add the reset idx for PCIe P0, P1, located in infra_ao RST2 registers.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
> ---

Applied to clk-next

References:
- [PATCH 0/2] MT8195: Add resets for PCIe controllers
  - From: AngeloGioacchino Del Regno
- [PATCH 2/2] clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1
  - From: AngeloGioacchino Del Regno

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