On 09/08/22 00:02, Daniel Parks wrote:
The RNG node for this platform claims pka_in_clk. Change it to claim the correct clock x1_clk. [1] [1]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721e/clocks.html#clocks-for-sa2-ul0-device Signed-off-by: Daniel Parks <danielrparks@xxxxxx> --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 43b6cf5791ee..917c9dc99efa 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -343,7 +343,7 @@ compatible = "inside-secure,safexcel-eip76"; reg = <0x0 0x4e10000 0x0 0x7d>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&k3_clks 264 1>; + clocks = <&k3_clks 264 2>; }; };
Reviewed-by: Jayesh Choudhary <j-choudhary@xxxxxx>
