The .txt file is missing the interrupts-extended property, which can
be used by some Armada chips. Add it and an example making use of it.
Signed-off-by: Andrew Lunn <andrew@xxxxxxx>
---
.../devicetree/bindings/watchdog/marvel.txt | 45 --------
.../bindings/watchdog/marvell,orion-wdt.yaml | 101 ++++++++++++++++++
2 files changed, 101 insertions(+), 45 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/watchdog/marvel.txt
create mode 100644 Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml
diff --git a/Documentation/devicetree/bindings/watchdog/marvel.txt b/Documentation/devicetree/bindings/watchdog/marvel.txt
deleted file mode 100644
index c1b67a78f00c..000000000000
--- a/Documentation/devicetree/bindings/watchdog/marvel.txt
+++ /dev/null
@@ -1,45 +0,0 @@
-* Marvell Orion Watchdog Time
-
-Required Properties:
-
-- Compatibility : "marvell,orion-wdt"
- "marvell,armada-370-wdt"
- "marvell,armada-xp-wdt"
- "marvell,armada-375-wdt"
- "marvell,armada-380-wdt"
-
-- reg : Should contain two entries: first one with the
- timer control address, second one with the
- rstout enable address.
-
-For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
-
-- reg : A third entry is mandatory and should contain the
- shared mask/unmask RSTOUT address.
-
-Clocks required for compatibles = "marvell,orion-wdt",
- "marvell,armada-370-wdt":
-- clocks : Must contain a single entry describing the clock input
-
-Clocks required for compatibles = "marvell,armada-xp-wdt"
- "marvell,armada-375-wdt"
- "marvell,armada-380-wdt":
-- clocks : Must contain an entry for each entry in clock-names.
-- clock-names : Must include the following entries:
- "nbclk" (L2/coherency fabric clock),
- "fixed" (Reference 25 MHz fixed-clock).
-
-Optional properties:
-
-- interrupts : Contains the IRQ for watchdog expiration
-- timeout-sec : Contains the watchdog timeout in seconds
-
-Example:
-
- wdt@20300 {
- compatible = "marvell,orion-wdt";
- reg = <0x20300 0x28>, <0x20108 0x4>;
- interrupts = <3>;
- timeout-sec = <10>;
- clocks = <&gate_clk 7>;
- };
diff --git a/Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml b/Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml
new file mode 100644
index 000000000000..0d150c6bf026
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml
@@ -0,0 +1,101 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/marvell,orion-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell Orion Watchdog
+
+allOf:
+ - $ref: "watchdog.yaml#"
+
+maintainers:
+ - Andrew Lunn <andrew@xxxxxxx>
+
+properties:
+ compatible:
+ enum:
+ - marvell,orion-wdt
+ - marvell,armada-370-wdt
+ - marvell,armada-375-wdt
+ - marvell,armada-380-wdt
+ - marvell,armada-xp-wdt
+
+ reg:
+ description:
+ Normally two items, the timer control address and the rstout enable
+ address. However armada-375 and 380 require and additional shared
+ mask/unmask rstout address
+
+ clocks:
+ minItems: 1
+ items:
+ - description: L2/coherency fabric clock
+ - description: Reference 25 MHz fixed-clock
+
+ interrupts:
+ maxItems: 1
+
+ interrupts-extended:
+ minItems: 1
+ maxItems: 2
+
+ timeout-sec: true
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+anyOf:
+ - required: [ interrupts ]
+ - required: [ interrupts-extended ]
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - marvell,armada-xp-wdt
+ - marvell,armada-375-wdt
+ - marvell,armada-380-wdt
+then:
+ properties:
+ clocks:
+ minItems: 2
+ clock-names:
+ items:
+ - const: nbclk
+ - const: fixed
+
+ required:
+ - clock-names
+
+else:
+ properties:
+ clocks:
+ maxItems: 1
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ watchdog@20300 {
+ compatible = "marvell,orion-wdt";
+ reg = <0x20300 0x28>, <0x20108 0x4>;
+ interrupts = <3>;
+ timeout-sec = <10>;
+ clocks = <&gate_clk 7>;
+ };
+
+ watchdog: watchdog@20400 {
+ compatible = "marvell,armada-380-wdt";
+ reg = <0x20400 0x34>, <0x20704 0x4>, <0x18260 0x4>;
+ clocks = <&coreclk 2>, <&refclk>;
+ clock-names = "nbclk", "fixed";
+ interrupts-extended = <&gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+...
--
2.37.2
