On 19/08/2022 22:00, Apurva Nandan wrote:
> The J784S4 SoC belongs to the K3 Multicore SoC architecture platform,
> providing advanced system integration in automotive ADAS applications
> and industrial applications requiring AI at the network edge. This SoC
> extends the Jacinto 7 family of SoCs with focus on high performance
> providing significant levels of processing power, graphics capability,
> video and imaging processing, virtualization and coherent memory
> support.
>
> Some highlights of this SoC are:
Thank you for your patch. There is something to discuss/improve.
> +
> + main_gpio_intr: interrupt-controller@a00000 {
> + compatible = "ti,sci-intr";
> + reg = <0x00 0x00a00000 0x00 0x800>;
0x0, not 0x00. Here and all other places.
> + ti,intr-trigger-type = <1>;
> + interrupt-controller;
> + interrupt-parent = <&gic500>;
> + #interrupt-cells = <1>;
> + ti,sci = <&sms>;
> + ti,sci-dev-id = <10>;
> + ti,interrupt-ranges = <8 360 56>;
> + };
> +
> + main_pmx0: pinctrl@11c000 {
> + compatible = "pinctrl-single";
> + /* Proxy 0 addressing */
> + reg = <0x0 0x11c000 0x0 0x120>;
> + #pinctrl-cells = <1>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0xffffffff>;
> + };
> +
(...)
> +
> + main_udmass_inta: msi-controller@33d00000 {
> + compatible = "ti,sci-inta";
> + reg = <0x00 0x33d00000 0x00 0x100000>;
> + interrupt-controller;
> + #interrupt-cells = <0>;
> + interrupt-parent = <&main_navss_intr>;
> + msi-controller;
> + ti,sci = <&sms>;
> + ti,sci-dev-id = <321>;
> + ti,interrupt-ranges = <0 0 256>;
> + };
> +
> + secure_proxy_main: mailbox@32c00000 {
> + compatible = "ti,am654-secure-proxy";
> + #mbox-cells = <1>;
> + reg-names = "target_data", "rt", "scfg";
> + reg = <0x00 0x32c00000 0x00 0x100000>,
> + <0x00 0x32400000 0x00 0x100000>,
> + <0x00 0x32800000 0x00 0x100000>;
> + interrupt-names = "rx_011";
> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + hwspinlock: spinlock@30e00000 {
Node name: hwlock
(spinlock is Linux specific)
> + compatible = "ti,am654-hwspinlock";
> + reg = <0x00 0x30e00000 0x00 0x1000>;
> + #hwlock-cells = <1>;
> + };
> +
> + mailbox0_cluster0: mailbox@31f80000 {
> + compatible = "ti,am654-mailbox";
> + reg = <0x00 0x31f80000 0x00 0x200>;
> + #mbox-cells = <1>;
> + ti,mbox-num-users = <4>;
> + ti,mbox-num-fifos = <16>;
> + interrupt-parent = <&main_navss_intr>;
> + };
(...)
> +
> + wkup_pmx0: pinctrl@4301c000 {
> + compatible = "pinctrl-single";
> + /* Proxy 0 addressing */
> + reg = <0x00 0x4301c000 0x00 0x178>;
> + #pinctrl-cells = <1>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0xffffffff>;
> + };
> +
> + wkup_gpio_intr: interrupt-controller@42200000 {
> + compatible = "ti,sci-intr";
> + reg = <0x00 0x42200000 0x00 0x400>;
> + ti,intr-trigger-type = <1>;
> + interrupt-controller;
> + interrupt-parent = <&gic500>;
> + #interrupt-cells = <1>;
> + ti,sci = <&sms>;
> + ti,sci-dev-id = <177>;
> + ti,interrupt-ranges = <16 928 16>;
> + };
> +
> + mcu_conf: syscon@40f00000 {
> + compatible = "syscon", "simple-mfd";
You need device specific compatible. Alone this is not allowed.
Best regards,
Krzysztof
