Hi Jerome，
On 2022/8/10 21:32, Jerome Brunet wrote:
[ EXTERNAL EMAIL ]
On Fri 05 Aug 2022 at 17:39, Yu Tu <yu.tu@xxxxxxxxxxx> wrote:
Hi Krzysztof,
Thank you for your reply.
On 2022/8/5 17:16, Krzysztof Kozlowski wrote:
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On 05/08/2022 10:57, Yu Tu wrote:
Added information about the S4 SOC PLL Clock controller in DT.
Signed-off-by: Yu Tu <yu.tu@xxxxxxxxxxx>
---
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index ff213618a598..a816b1f7694b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -92,6 +92,14 @@ apb4: apb4@fe000000 {
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
+ clkc_pll: pll-clock-controller@8000 {
Node names should be generic - clock-controller.
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
I will change to clkc_pll: clock-controller@8000, in next version.
Same comment applies to the binding doc.
OKay.
Also it would be nice to split this in two series.
Bindings and drivers in one, arm64 dt in the other. These changes goes
in through different trees.
At present, Bindings, DTS and drivers are three series. Do you mean to
put Bindings and drivers together? If so, checkpatch.pl will report a
warning.
Best regards,
Krzysztof
.
.
