On 05/08/2022 15:01, Conor.Dooley@xxxxxxxxxxxxx wrote:
> On 05/08/2022 13:56, Conor Dooley wrote:
>> The "data" region of the PolarFire SoC's system controller mailbox is
>> not one continuous register space - the system controller's QSPI sits
>> between the control and data registers. Split the "data" reg into two
>> parts: "data" & "control".
>>
>> Fixes: 213556235526 ("dt-bindings: soc/microchip: update syscontroller compatibles")
>
> I omitted the second fixes tag:
> Fixes: ed9543d6f2c4 ("dt-bindings: add bindings for polarfire soc mailbox")
>
>> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>> ---
>> .../bindings/mailbox/microchip,mpfs-mailbox.yaml | 15 +++++++++++----
>> 1 file changed, 11 insertions(+), 4 deletions(-)
>>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Best regards,
Krzysztof
