On Sun, Sep 28, 2014 at 11:24:04PM +1000, gerg@xxxxxxxxxxx wrote: > From: Greg Ungerer <gerg@xxxxxxxxxxx> > > The Armada SoC family implementation of this SPI hardware module has > extended the configuration register to allow for a wider range of SPI > clock rates. Specifically the Serial Baud Rate Pre-selection bits in the > SPI Interface Configuration Register now also use bits 6 and 7 as well. Applied, thanks.
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