On 13/07/2022 16:51, Tomer Maimon wrote:
> On Wed, 13 Jul 2022 at 17:29, Krzysztof Kozlowski
> <krzysztof.kozlowski@xxxxxxxxxx> wrote:
>>
>> On 13/07/2022 15:35, Tomer Maimon wrote:
>>
>>>>> +static int npcm8xx_pinctrl_probe(struct platform_device *pdev)
>>>>> +{
>>>>> + struct npcm8xx_pinctrl *pctrl;
>>>>> + int ret;
>>>>> +
>>>>> + pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
>>>>> + if (!pctrl)
>>>>> + return -ENOMEM;
>>>>> +
>>>>> + pctrl->dev = &pdev->dev;
>>>>> + dev_set_drvdata(&pdev->dev, pctrl);
>>>>> +
>>>>> + pctrl->gcr_regmap =
>>>>> + syscon_regmap_lookup_by_compatible("nuvoton,npcm845-gcr");
>>>>
>>>> No. Use property. By this patchset, I would expect that you learnt from
>>>> previous mistakes around this. Why repeating the same trouble second time?
>>> You suggest to use phandle property like nuvoton,sysgcr even that the
>>> NPCM8XX pin controller driver is used only NPCM8XX SoC, so the only
>>> GCR node in the NPCM8XX SoC is nuvoton,npcm845-gcr?
>>
>> Yes. The previous case (reset driver, AFAIR) was also about driver used
>> only in one SoC, wasn't it?
> Actually not, the NPCM reset driver serves NPCM7XX and NPCM8XX and
> probably other future BMC SoC's
No, when someone developed reset driver, it served only NPCM7XX. So
using this argument - only one SoC is supported - that person use
exactly the same API as here.
And it was wrong...
Now you use the same argument - only one SoC is supported.
I clearly see a pattern here...
> Still, you suggest using the phandle property in the driver even if
> the driver serves one SoC?
>>
>> Best regards,
>> Krzysztof
>
> Best regards,
>
> Tomer
Best regards,
Krzysztof
