On 08/07/2022 08:27, Yu Tu wrote: > Add new clock controller compatible and dt-bindings header for the > Everything-Else domain of the S4 SoC. > > Signed-off-by: Yu Tu <yu.tu@xxxxxxxxxxx> > --- > .../bindings/clock/amlogic,gxbb-clkc.txt | 1 + > MAINTAINERS | 1 + > include/dt-bindings/clock/s4-clkc.h | 354 ++++++++++++++++++ > 3 files changed, 356 insertions(+) > create mode 100644 include/dt-bindings/clock/s4-clkc.h > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt > index 7ccecd5c02c1..301b43dea912 100644 > --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt > +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt > @@ -12,6 +12,7 @@ Required Properties: > "amlogic,g12a-clkc" for G12A SoC. > "amlogic,g12b-clkc" for G12B SoC. > "amlogic,sm1-clkc" for SM1 SoC. > + "amlogic,s4-clkc" for S4 SoC. > - clocks : list of clock phandle, one for each entry clock-names. > - clock-names : should contain the following: > * "xtal": the platform xtal > diff --git a/MAINTAINERS b/MAINTAINERS > index c1abc53f9e91..e4ca46c5c8a1 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1775,6 +1775,7 @@ F: Documentation/devicetree/bindings/clock/amlogic* > F: drivers/clk/meson/ > F: include/dt-bindings/clock/gxbb* > F: include/dt-bindings/clock/meson* > +F: include/dt-bindings/clock/s* > > ARM/Amlogic Meson SoC Crypto Drivers > M: Corentin Labbe <clabbe@xxxxxxxxxxxx> > diff --git a/include/dt-bindings/clock/s4-clkc.h b/include/dt-bindings/clock/s4-clkc.h > new file mode 100644 > index 000000000000..8b46d54d79fe > --- /dev/null > +++ b/include/dt-bindings/clock/s4-clkc.h > @@ -0,0 +1,354 @@ > +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ > +/* > + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. > + * Author: Yu Tu <yu.tu@xxxxxxxxxxx> > + */ > + > +#ifndef __S4_CLKC_H > +#define __S4_CLKC_H Use header guards mathcing paths. See other files for examples. > + > +/* > + * CLKID index values > + */ > + > +#define CLKID_PLL_BASE 0 > +#define CLKID_FIXED_PLL_DCO (CLKID_PLL_BASE + 0) Drop CLKID_PLL_BASE > +#define CLKID_FIXED_PLL (CLKID_PLL_BASE + 1) ditto... and so on. Best regards, Krzysztof
