[PATCH 3/5] dt-bindings: arm: tegra: nvec: Convert to json-schema

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From: Thierry Reding <treding@xxxxxxxxxx>

Convert the NVIDIA embedded controller bindings from the free-form text
format to json-schema.

Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
---
Marc,

you authored this binding a long time ago, which makes the default
license for this GPL-2.0. However, the preference is for DT bindings to
be dual-licensed under the more permissive GPL-2.0-only OR BSD-2-Clause
as done in this patch. Do you have any objections to relicensing?

Thierry

 .../bindings/arm/tegra/nvidia,nvec.txt        | 21 -----
 .../bindings/arm/tegra/nvidia,nvec.yaml       | 94 +++++++++++++++++++
 2 files changed, 94 insertions(+), 21 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.txt
 create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.yaml

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.txt
deleted file mode 100644
index 5ae601e7f51f..000000000000
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-NVIDIA compliant embedded controller
-
-Required properties:
-- compatible : should be "nvidia,nvec".
-- reg : the iomem of the i2c slave controller
-- interrupts : the interrupt line of the i2c slave controller
-- clock-frequency : the frequency of the i2c bus
-- gpios : the gpio used for ec request
-- slave-addr: the i2c address of the slave controller
-- clocks : Must contain an entry for each entry in clock-names.
-  See ../clocks/clock-bindings.txt for details.
-- clock-names : Must include the following entries:
-  Tegra20/Tegra30:
-  - div-clk
-  - fast-clk
-  Tegra114:
-  - div-clk
-- resets : Must contain an entry for each entry in reset-names.
-  See ../reset/reset.txt for details.
-- reset-names : Must include the following entries:
-  - i2c
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.yaml
new file mode 100644
index 000000000000..c997faa42c31
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,nvec.yaml
@@ -0,0 +1,94 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/tegra/nvidia,nvec.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA compliant embedded controller
+
+maintainers:
+  - Thierry Reding <thierry.reding@xxxxxxxxx>
+  - Jon Hunter <jonathanh@xxxxxxxxxx>
+
+properties:
+  compatible:
+    const: nvidia,nvec
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    items:
+      - description: divider clock
+      - description: fast clock
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: div-clk
+      - const: fast-clk
+
+  resets:
+    items:
+      - description: module reset
+
+  reset-names:
+    items:
+      - const: i2c
+
+  clock-frequency:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: frequency of the I2C bus
+
+  request-gpios:
+    description: phandle to the GPIO used for EC request
+
+  slave-addr:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: I2C address of the slave controller
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+  - clock-frequency
+  - request-gpios
+  - slave-addr
+
+examples:
+  - |
+    #include <dt-bindings/clock/tegra20-car.h>
+    #include <dt-bindings/gpio/tegra-gpio.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    nvec@7000c500 {
+      compatible = "nvidia,nvec";
+      reg = <0x7000c500 0x100>;
+      interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+      #address-cells = <1>;
+      #size-cells = <0>;
+      clock-frequency = <80000>;
+      request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
+      slave-addr = <138>;
+      clocks = <&tegra_car TEGRA20_CLK_I2C3>,
+               <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
+      clock-names = "div-clk", "fast-clk";
+      resets = <&tegra_car 67>;
+      reset-names = "i2c";
+    };
-- 
2.36.1




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