[PATCH 14/43] dt-bindings: phy: qcom,qmp-pcie: clean up clock constraints

[Johan Hovold <johan+linaro@xxxxxxxxxx>]

The PCIe PHY binding requires two, three or four clocks.

Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
---
 Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
index 7cdc1cce06cf..0486b2b48d72 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml
@@ -43,11 +43,11 @@ properties:
   ranges: true
 
   clocks:
-    minItems: 1
+    minItems: 2
     maxItems: 4
 
   clock-names:
-    minItems: 1
+    minItems: 2
     maxItems: 4
 
   resets:
-- 
2.35.1