From: Thierry Reding <treding@xxxxxxxxxx> The registers for the AON pinmux reside in a partition different from the registers for the main pinmux. Instead of treating them as one and the same device, split them up so that they are each their own devices. Also add gpio-ranges properties to the corresponding GPIO controllers such that the pinmux and GPIO controllers can be paired up properly. Signed-off-by: Thierry Reding <treding@xxxxxxxxxx> --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 78277b538002..2638e480e7da 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -86,6 +86,7 @@ gpio: gpio@2200000 { interrupt-controller; #gpio-cells = <2>; gpio-controller; + gpio-ranges = <&pinmux 0 0 169>; }; cbb-noc@2300000 { @@ -626,9 +627,7 @@ tegra_asrc: asrc@2910000 { pinmux: pinmux@2430000 { compatible = "nvidia,tegra194-pinmux"; - reg = <0x2430000 0x17000>, - <0xc300000 0x4000>; - + reg = <0x2430000 0x17000>; status = "okay"; pex_rst_c5_out_state: pex_rst_c5_out { @@ -1638,6 +1637,14 @@ gpio_aon: gpio@c2f0000 { #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + gpio-range = <&pinmux_aon 0 0 30>; + }; + + pinmux_aon: pinmux@c300000 { + compatible = "nvidia,tegra194-pinmux-aon"; + reg = <0xc300000 0x4000>; + + status = "okay"; }; pwm4: pwm@c340000 { -- 2.36.1