On Sun, Jun 26, 2022 at 02:25:03AM +0300, Dmitry Baryshkov wrote: > Split Mobile Display SubSystem (MDSS) root node bindings to the separate > yaml file. Changes to the existing (txt) schema: > - Add optional "vbif_nrt_phys" region used by msm8996 > - Make "bus" and "vsync" clocks optional (they are not used by some > platforms) > - Add (optional) "core" clock added recently to the mdss driver > - Add optional resets property referencing MDSS reset > - Define child nodes together with compatibles > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > --- > .../devicetree/bindings/display/msm/mdp5.txt | 30 +-- > .../devicetree/bindings/display/msm/mdss.yaml | 173 ++++++++++++++++++ > 2 files changed, 174 insertions(+), 29 deletions(-) > create mode 100644 Documentation/devicetree/bindings/display/msm/mdss.yaml > > diff --git a/Documentation/devicetree/bindings/display/msm/mdp5.txt b/Documentation/devicetree/bindings/display/msm/mdp5.txt > index 43d11279c925..65d03c58dee6 100644 > --- a/Documentation/devicetree/bindings/display/msm/mdp5.txt > +++ b/Documentation/devicetree/bindings/display/msm/mdp5.txt > @@ -2,37 +2,9 @@ Qualcomm adreno/snapdragon MDP5 display controller > > Description: > > -This is the bindings documentation for the Mobile Display Subsytem(MDSS) that > -encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display > +This is the bindings documentation for the MDP5 display > controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996. > > -MDSS: > -Required properties: > -- compatible: > - * "qcom,mdss" - MDSS > -- reg: Physical base address and length of the controller's registers. > -- reg-names: The names of register regions. The following regions are required: > - * "mdss_phys" > - * "vbif_phys" > -- interrupts: The interrupt signal from MDSS. > -- interrupt-controller: identifies the node as an interrupt controller. > -- #interrupt-cells: specifies the number of cells needed to encode an interrupt > - source, should be 1. > -- power-domains: a power domain consumer specifier according to > - Documentation/devicetree/bindings/power/power_domain.txt > -- clocks: device clocks. See ../clocks/clock-bindings.txt for details. > -- clock-names: the following clocks are required. > - * "iface" > - * "bus" > - * "vsync" > -- #address-cells: number of address cells for the MDSS children. Should be 1. > -- #size-cells: Should be 1. > -- ranges: parent bus address space is the same as the child bus address space. > - > -Optional properties: > -- clock-names: the following clocks are optional: > - * "lut" What happened to lut? > - > MDP5: > Required properties: > - compatible: > diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml > new file mode 100644 > index 000000000000..55c70922361d > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml > @@ -0,0 +1,173 @@ > +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/msm/mdss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Mobile Display SubSystem (MDSS) dt properties s/dt properties// > + > +maintainers: > + - Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > + - Rob Clark <robdclark@xxxxxxxxx> > + > +description: | Don't need '|'. > + This is the bindings documentation for the Mobile Display Subsytem(MDSS) that > + encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc. > + > +properties: > + compatible: > + enum: > + - qcom,mdss > + > + reg: > + minItems: 2 > + maxItems: 3 > + > + reg-names: > + minItems: 2 > + items: > + - const: mdss_phys > + - const: vbif_phys > + - const: vbif_nrt_phys Let's not continue with the _phys silliness. > + > + interrupts: > + maxItems: 1 > + > + interrupt-controller: > + true > + > + "#interrupt-cells": > + const: 1 > + > + power-domains: > + maxItems: 1 > + description: | > + The MDSS power domain provided by GCC > + > + clocks: > + minItems: 1 > + maxItems: 4 > + > + clock-names: > + minItems: 1 > + items: > + - const: iface > + - const: bus > + - const: vsync > + - const: core > + > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + ranges: > + true > + > + resets: > + items: > + - description: MDSS_CORE reset > + > +required: > + - compatible > + - reg > + - reg-names > + - interrupts > + - interrupt-controller > + - "#interrupt-cells" > + - power-domains > + - clocks > + - clock-names > + - "#address-cells" > + - "#size-cells" > + - ranges > + > +patternProperties: > + "^mdp@(0|[1-9a-f][0-9a-f]*)$": > + type: object > + properties: > + compatible: > + enum: > + - qcom,mdp5 These child nodes need to reference child schemas or be complete. If they aren't converted, then just 'type: object' and be done with it. > + > + "^dsi@(0|[1-9a-f][0-9a-f]*)$": > + type: object > + properties: > + compatible: > + enum: > + - qcom,mdss-dsi-ctrl > + > + "^dsi-phy@(0|[1-9a-f][0-9a-f]*)$": > + type: object > + properties: > + compatible: > + enum: > + - qcom,dsi-phy-7nm > + - qcom,dsi-phy-7nm-8150 > + - qcom,dsi-phy-10nm > + - qcom,dsi-phy-10nm-8998 > + - qcom,dsi-phy-14nm > + - qcom,dsi-phy-14nm-660 > + - qcom,dsi-phy-14nm-8953 > + - qcom,dsi-phy-20nm > + - qcom,dsi-phy-28nm-8960 > + - qcom,dsi-phy-28nm-hpm > + - qcom,dsi-phy-28nm-lp > + - qcom,sc7280-dsi-phy-7nm > + > + "^hdmi-phy@(0|[1-9a-f][0-9a-f]*)$": > + type: object > + properties: > + compatible: > + enum: > + - qcom,hdmi-phy-8660 > + - qcom,hdmi-phy-8960 > + - qcom,hdmi-phy-8974 > + - qcom,hdmi-phy-8084 > + - qcom,hdmi-phy-8996 > + > + "^hdmi-tx@(0|[1-9a-f][0-9a-f]*)$": > + type: object > + properties: > + compatible: > + enum: > + - qcom,hdmi-tx-8084 > + - qcom,hdmi-tx-8660 > + - qcom,hdmi-tx-8960 > + - qcom,hdmi-tx-8974 > + - qcom,hdmi-tx-8994 > + - qcom,hdmi-tx-8996 > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,gcc-msm8916.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + mdss@1a00000 { > + compatible = "qcom,mdss"; > + reg = <0x1a00000 0x1000>, > + <0x1ac8000 0x3000>; > + reg-names = "mdss_phys", "vbif_phys"; > + > + power-domains = <&gcc MDSS_GDSC>; > + > + clocks = <&gcc GCC_MDSS_AHB_CLK>, > + <&gcc GCC_MDSS_AXI_CLK>, > + <&gcc GCC_MDSS_VSYNC_CLK>; > + clock-names = "iface", > + "bus", > + "vsync"; > + > + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; > + > + interrupt-controller; > + #interrupt-cells = <1>; > + > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + }; > +... > -- > 2.35.1 > >
